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Figure 52.
Development Board Clocking Diagram
ITP_BCLK
CPU_2/
CPU_2#
100MHz_CORE_Diff
CPU_0/
CPU_0#
ICH_USB_48MHZ_CLK
USB_48
ICH_14MHZ_CLK
REF
ICH_33MHZ_CLK
PCI_3
SATA_100MHZ_Diff
SRC_4/
SRC_4#
PCI-E_100MHZ_Diff
SRC_2/
SRC_2#
SIO_33MHZ_CLK
PCI_2
LPC_14MHZ_CLK
REF
EXP_SLOT1_100MHZ_CLK
SRC_3/
SRC_3#
EXP_SLOT2_100MHZ_CLK
SRC_1/
SRC_1#
FWH_33MHZ_CLK
PCI_1
PORT80_33MHZ_CLK
PCI_0
TPM_33MHZ_CLK
PCI_4
CK-410
®
Intel
EP80579 Integrated Processor Product Line
Platform Design Guide
93
®
Intel
EP80579 Integrated Processor Product Line—Platform System Clock
Development Board Clocking
ITP
125MHZ_CLK
8.192 MHz
EP80579
33 MHz SE
32.786 kHz
SIO
PCI Express
Slot
DB800
FWH
Port 80
TPM
Memory
25MHZ_CLK
GbE PHY
E1 / T1 I/O
On Mezzanines
LEB Connectors
Fanout
Buffer
LEB 33MHz
OSC
EXP_BF1_100MHZ_CLK
EXP_BF2_100MHZ_CLK
EXP_BF3_100MHZ_CLK
EXP_BF4_100MHZ_CLK
EXP_BF5_100MHZ_CLK
Note: Differential Clock
Order Number: 320068-005US
GbE
25 MHz
Crystal
TDM
Osc
PCIe
5P Switch
Slot 1
Slot 2
Slot 3
Slot 4
May 2010
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