Intel EP80579 Manual page 305

Table 100. Schematic Checklist (Sheet 22 of 26)
Checklist Items
EX_ADDR[24:0]
EX_BE[1:0]
EX_CLK
®
Intel EP80579 Integrated Processor Product Line
Platform Design Guide
305
®
Intel EP80579 Integrated Processor Product Line—Schematics Checklist
I/O Type
Recommendations
(Default)
• Expansion Bus Address.
• Connect to Expansion Bus on-
board devices and inbound/
outbound buffer
• Strap EX_ADDR[23:21] as
shown below to determine LEB
Bus memory size.
Note:
• BIOS can also be used to
configure the LEB_SIZE
through the MMBAR (Expansion
Bus Base Address Register)
instead of external strapping.
(Refer to EP80579
LEB_SIZE Strapping Options:
EX_ADDR
LEB Memory Size
[23:21]
Strapping
000
001
010
011
1XX
Note: Strap EX_ADDR[23:21] = 000 or use
BIOS to configure LEB_SIZE = 0 MB if
the LEB Bus is not used.
• Expansion Bus Byte Enables.
• Used to select the particular
I/O
bytes that will be written or
read when executing inbound/
outbound HSS transfers.
• 33 MHz Expansion Clock
• Use an External 33 MHz Clock
with a clock buffer
• Connected to one of the
I
outputs from the Expansion
Clock Fanout Buffer.
• Connect clock
±5% series resistor.
• The LEB controller allocates up to
256 MB of memory space to support
up to 8 devices on the LEB Bus. At
power-up or whenever RESET_IN#
is asserted, EX_ADDR[23:21] bits
are captured and stored by the LEB
controller to detemine the LEB
memory size (LEB_SIZE) and the
number of devices on the bus,
which also controls the active LEB
chip selects. The EX_ADDR[23:21]
should be externally strapped with
1K Ω pull-ups and pull-downs to
determine the LEB_SIZE.
Note:
• Can be left as no connect (NC)
Datasheet)
when the LEB Bus is not connected
to an interfacing device or not used
# of
Devices
(LEB_SIZE)
Supported
0 MB 0
32 MB 1
64 MB 2
128 MB 4
256 MB 8
Note:
• Can be left as no connect (NC)
when the interface is not connected
to an interfacing device or not used
The EP80579 Expansion Bus connects to
several devices on the Platform.
• Flash (2)
• FPGA
• HSS [3:0]
Each device should be connected to one
of the outputs from the clock fanout
buffer.
through a 33 Ω
Note:
• Connect EX_CLK to a 33 MHz clock
source when the interface is not
used or connected to other devices.
• See Section 2.3
Order Number: 320068-005US
Comments
May 2010