Dma; Dma-Accessible Registers - Motorola DSP56303 User Manual

bset
; Short Interrupt Routine
org
movep
move
5.4.3

DMA

The Direct Memory Access (DMA) controller permits data transfers between
internal/external memory and/or internal/external I/O in any combination without the
intervention of the DSP56303 core. Dedicated DMA address and data buses and internal
memory partitioning ensure that a high level of isolation is achieved so the DMA operation
does not interfere with the core operation or slow it down. The DMA moves data to/from the
peripheral transmit/receive registers. The programmer can use the DMA control registers to
configure sources and destinations of data transfers. Depending on the peripheral, one to four
peripheral request sources are available. This is the most efficient method of data transfer
available. Core intervention is not required after the DMA channel is initialized.
Block
ESSI
SCI
EFCOP
HI08
Timer
Example 5-3 shows a DMA configuration for transferring data to the Host Transmit register
of the HI08.
Example 5-2. Interrupts
#M_HRIE,x:M_HCR
P:$60
x:M_HRX,x1
x1,y:(r0)+
Table 5-1. DMA-Accessible Registers
Register
TX0
TX1
TX2
RX
SRX
STX
FDIR
FDOR
HTX
HRX
Programming the Peripherals
; enable host receive interrupt
; HI08 Receive Data Full interrupt
Read
Data Transfer Methods
DMA
Write
No Yes
No Yes
No Yes
Yes No
Yes No
No Yes
No Yes
Yes No
No Yes
Yes No
5-5