Interrupt Priority Register-Core (Iprc) (X:$Ffffff); Pll Control Register (Pctl); Dram Control Register (Dcr; B.1 Internal I/O Memory Map - Motorola DSP56303 User Manual

24-bit digital signal processor
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B.1
Internal I/O Memory Map
Table B-2. Internal I/O Memory Map (X Data Memory)
Peripheral
16-Bit Address
IPR
PLL
OnCE
BIU
DMA
DMA0
DMA1
DMA2
24-Bit Address
$FFFF
$FFFFFF
$FFFE
$FFFFFE
$FFFD
$FFFFFD
$FFFC
$FFFFFC
$FFFB
$FFFFFB
$FFFA
$FFFFFA
$FFF9
$FFFFF9
$FFF8
$FFFFF8
$FFF7
$FFFFF7
$FFF6
$FFFFF6
$FFF5
$FFFFF5
$FFF4
$FFFFF4
$FFF3
$FFFFF3
$FFF2
$FFFFF2
$FFF1
$FFFFF1
$FFF0
$FFFFF0
$FFEF
$FFFFEF
$FFEE
$FFFFEE
$FFED
$FFFFED
$FFEC
$FFFFEC
$FFEB
$FFFFEB
$FFEA
$FFFFEA
$FFE9
$FFFFE9
$FFE8
$FFFFE8
$FFE7
$FFFFE7
$FFE6
$FFFFE6
$FFE5
$FFFFE5
$FFE4
$FFFFE4
Programming Reference
Internal I/O Memory Map
Register Name
Interrupt Priority Register Core (IPRC)
Interrupt Priority Register Peripheral (IPRP)

PLL Control Register (PCTL)

OnCE GDB Register (OGDB)
Bus Control Register (BCR)

DRAM Control Register (DCR)

Address Attribute Register 0 (AAR0)
Address Attribute Register 1 (AAR1)
Address Attribute Register 2 (AAR2)
Address Attribute Register 3 (AAR3)
ID Register (IDR)
DMA Status Register (DSTR)
DMA Offset Register 0 (DOR0)
DMA Offset Register 1 (DOR1)
DMA Offset Register 2 (DOR2)
DMA Offset Register 3 (DOR3)
DMA Source Address Register (DSR0)
DMA Destination Address Register (DDR0)
DMA Counter (DCO0)
DMA Control Register (DCR0)
DMA Source Address Register (DSR1)
DMA Destination Address Register (DDR1)
DMA Counter (DCO1)
DMA Control Register (DCR1)
DMA Source Address Register (DSR2)
DMA Destination Address Register (DDR2)
DMA Counter (DCO2)
DMA Control Register (DCR2)
B-3

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