Phase Locked Loop (Pll) Equates - Motorola DSP56303 User Manual

24-bit digital signal processor
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M_DTD4
EQU
M_DTD5
EQU
M_DACT
EQU
M_DCH
EQU
M_DCH0
EQU
M_DCH1
EQU
M_DCH2
EQU
;---------------------------------------------------------------
;
A.9

Phase Locked Loop (PLL) equates

;
EQUATES for Phase Locked Loop (PLL)
;
;---------------------------------------------------------------
;
Register Addresses Of PLL
M_PCTL
EQU
$FFFFFD
;
PLL Control Register
M_MF
EQU
$FFF
M_DF
EQU
$7000
M_XTLR
EQU
15
M_XTLD
EQU
16
M_PSTP
EQU
17
M_PEN
EQU
18
M_PCOD
EQU
19
M_PD
EQU
;---------------------------------------------------------------
;
4
; DMA Channel Transfer Done Status 4
5
; DMA Channel Transfer Done Status 5
8
; DMA Active State
$E00
; DMA Active Channel Mask
: (DCH0DCH2)
9
; DMA Active Channel 0
10
; DMA Active Channel 1
11
; DMA Active Channel 2
; PLL Control Register
; Multiplication Factor Bits Mask (MF0-MF11)
; Division Factor Bits Mask (DF0-DF2)
; XTAL Range select bit
; XTAL Disable Bit
; STOP Processing State Bit
; PLL Enable Bit
; PLL Clock Output Disable Bit
$F00000
; PreDivider Factor Bits Mask (PD0-PD3)
Bootstrap Program
Phase Locked Loop (PLL) equates
A-17

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