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list B-2
R
RAM
program 3-1
reading status registers 5-2
Receive Byte Registers (RXH, RXM, RXL) 6-5
6-30
Receive Clock Mode Source (RCM) 8-19
Receive Data (RXD) signal 8-4
Receive Data Full (RDF) bit 6-7
Receive Data Register (RX) 7-30
Receive Data Register Full (RDF) bit 7-28
Receive Data Register Full (RDRF) bit 8-18
Receive Data Register Full (RXDF) bit 6-29
Receive Enable (RE) bit 7-20
Receive Exception Interrupt Enable (REIE) bit 7-19
Receive Frame Sync Flag (RFS) 7-29
Receive Interrupt Enable (RIE) bit 7-19
Receive Last Slot Interrupt Enable (RLIE) bit 7-19
Receive Request Enable (RREQ) bit 6-26
Receive Shift Register 7-29
Receive Slot Mask Registers (RSMA and RSMB) 7-14
7-35
Receive with Exception Interrupt Enable (REIE) bit 8-12
Received Bit 8 (R8) bit 8-17
Receiver Enable (RE) bit 8-14
Receiver Overrun Error Flag (ROE) 7-28
Receiver Wakeup Enable (RWU) bit 8-15
register banks 6-4
RESET 2-9
resets
hardware and software 6-4
,
,
ROM, bootstrap 1-5
3-1
Rounding Mode (RM) bit 4-10
RX clock 7-11
RXH, RXM, RXL registers 6-30
S
Scaling (S) bit 4-13
Scaling (S) Mode bits 4-13
SCI Clock Control Register (SCCR) 8-9
bit definitions 8-19
Clock Divider (CD) 8-20
Clock Out Divider (COD) 8-19
Clock Prescaler (SCP) 8-19
programming sheet B-30
Receive Clock Mode Source (RCM) 8-19
Transmit Clock Source (TCM) 8-19
SCI Clock Polarity (SCKP) bit 8-12
SCI Control Register (SCR) 8-9
bit definitions 8-12
Index-10
,
,
6-6
3-3
,
8-19
,
8-12
DSP56303 User's Manual
Idle Line Interrupt Enable (ILIE) 8-13
programming sheet B-29
Receive with Exception Interrupt Enable (REIE) 8-12
Receiver Enable (RE) 8-14
Receiver Wakeup Enable (RWU) 8-15
SCI Clock Polarity (SCKP) 8-12
SCI Receive Interrupt Enable (RIE) 8-13
SCI Shift Direction (SSFTD) 8-15
SCI Transmit Interrupt Enable (TIE) 8-13
Send Break (SBK) 8-15
Timer Interrupt Enable (TMIE) 8-13
Timer Interrupt Rate (STIR) 8-12
Transmitter Enable (TE) 8-14
Wakeup Mode Select (WAKE) 8-15
Wired-OR Mode Select (WOMS) 8-14
Word Select (WDS) 8-16
SCI Interrupt Priority Level (SCL) bits 4-19
SCI pins
RXD, TXD, SCLK 8-3
SCI Receive Data Register (SRX) 8-9
SCI Receive Interrupt Enable (RIE) bit 8-13
SCI Serial Clock signal (SCLK) 8-4
SCI Shift Direction (SSFTD) 8-15
,
SCI Status Register (SSR) 8-9
bit definitions 8-17
Framing Error Flag (FE) 8-17
Idle Line Flag (IDLE) 8-18
Overrun Error Flag (OR) 8-18
Parity Error (PE) 8-17
Receive Data Register Full (RDRF) 8-18
Received Bit 8 (R8) 8-17
Transmit Data Register Empty (TDRE) 8-18
Transmitter Empty (TRNE) 8-18
SCI Transmit Data Address Register (STXA) 8-9
SCI Transmit Data Register (STX or STXA) 8-22
SCI Transmit Data Register (STX) 8-9
SCI Transmit Interrupt Enable (TIE) bit 8-13
,
SCLK 8-2
8-6
SCS byte 4-15
Select SCK (SSC1) bit 7-15
Send Break (SBK) bit 8-15
Serial Clock (SCK) 7-3
Serial Clock (SCLK), SCI 8-2
Serial Communications Interface (SCI) 1-13
8-1
Address Mode Wakeup 8-3
Asynchronous mode 8-2
bootstrap loading 8-8
crystal frequency 8-6
data registers 8-22
Data Word Formats 8-10
enable wakeup function 8-15
enable/disable SCI receive data with exception
interrupt 8-12
,
8-22
,
8-17
,
8-23
,
,
,
2-2
2-19
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