Motorola DSP56303 User Manual page 249

24-bit digital signal processor
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; After reading the program words, program execution starts from the same
; address where loading started.
; The Host Interface bootstrap load program may be stopped by setting the
; Host Flag 0 (HF0). This will start execution of the loaded program from
; the specified starting address.
;
; The base address of the HI08 in multiplexed mode is 0x80 and is not modified
; by the bootstrap code. All the address lines are enabled and should be
; connected accordingly.
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; If MC:MB:MA=111, then it loads the program RAM from the Host
; Interface programmed to operate in the MC68302 bus mode,
; in single-strobe pin configuration.
; The HOST MC68302 bootstrap code expects accesses that are byte wide.
; The HOST MC68302 bootstrap code expects to read 3 bytes forming a 24-bit word
; specifying the number of program words, 3 bytes forming a 24-bit word
; specifying the address to start loading the program words and then 3 bytes
; forming 24-bit words for each program word to be loaded.
; The program words will be stored in contiguous PRAM memory locations
; starting at the specified starting address.
; After reading the program words, program execution starts from the same
; address where loading started.
; The Host Interface bootstrap load program may be stopped by setting the
; Host Flag 0 (HF0). This will start execution of the loaded program from
; the specified starting address.
;
BOOT
equ
$D00000
AARV
equ
$D00409
M_SSR
EQU
$FFFF93
M_STXL
EQU
$FFFF95
M_SRXL
EQU
$FFFF98
M_SCCR
EQU
$FFFF9B
M_SCR
EQU
$FFFF9C
M_PCRE
EQU
$FFFF9F
M_AAR1
EQU
$FFFFF8
M_HPCR
EQU
$FFFFC4
M_HSR
EQU
$FFFFC3
M_HRX
EQU
$FFFFC6
HRDF
EQU
$0
HF0
EQU
$3
HEN
EQU
$6
ORG PL: $ff0000,PL:$ff0000; bootstrap code starts at $ff0000
; this is the location in P memory
; on the external memory bus
; where the external byte-wide
; EPROM would be located
; AAR1 selects the EPROM as CE~
; mapped as P from $D00000 to
; $DFFFFF, active low
; SCI Status Register
; SCI Transmit Data Register (low)
; SCI Receive Data Register (low)
; SCI Clock Control Register
; SCI Control Register
; Port E Control register
; Address Attribute Register 1
; Host Polarity Control Register
; Host Status Register
; Host Receive Register
; Host Receive Data Full
; Host Flag 0
; Host Enable
Bootstrap Program
Bootstrap Code
A-3

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