Essi Control Register A (Cra) Bit Definitions - Motorola DSP56303 User Manual

24-bit digital signal processor
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Table 7-3. ESSI Control Register A (CRA) Bit Definitions
Bit Number
Bit Name
23
22
SSC1
21–19
WL[2–0]
Reset Value
0
Reserved. Write to 0 for future compatibility.
0
Select SC1
Controls the functionality of the SC1 signal. If SSC1 is set, the ESSI is
configured in Synchronous mode (the CRB synchronous/asynchronous bit
(SYN) is set), and transmitter 2 is disabled (transmit enable (TE2) = 0), then
the SC1 signal acts as the transmitter 0 driver-enabled signal while the SC1
signal is configured as output (SCD1 = 1). This configuration enables an
external buffer for the transmitter 0 output. If SSC1 is cleared, the ESSI is
configured in Synchronous mode (SYN = 1), and transmitter 2 is disabled
(TE2 = 0), then the SC1 acts as the serial I/O flag while the SC1 signal is
configured as output (SCD1 = 1).
0
Word Length Control
Select the length of the data words transferred via the ESSI. Word lengths of
8-, 12-, 16-, 24-, or 32-bits can be selected. The ESSI data path
programming model in Figure 7-12 and Figure 7-13 shows additional
information on how to select different lengths for data words. The ESSI data
registers are 24 bits long. The ESSI transmits 32-bit words in one of two
ways:
n
by duplicating the last bit 8 times when WL[2–0] = 100
n
by duplicating the first bit 8 times when WL[2–0] = 101.
NOTE: When WL[2–0] = 100, the ESSI is designed to duplicate the last bit of
the 24-bit transmission eight times to fill the 32-bit shifter. Instead, after the
24-bit word is shifted correctly, eight zeros (0s) are shifted.
WL2
0
0
0
0
1
1
1
1
NOTE: When the ESSI transmits data in On-Demand mode (that is, MOD = 1
in the CRB and DC[4–0]=00000 in the CRA) with WL[2–0] = 100, the
transmission does not work properly. To ensure correct operation, do not use
On-Demand mode with the WL[2–0] = 100 32-bit word length mode.
Enhanced Synchronous Serial Interface (ESSI)
Description
ESSI Word Length Selection
WL1
WL0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
ESSI Programming Model
Number of Bits/Word
8
12
16
24
32
(valid data in the first 24
bits)
32
(valid data in the last 24
bits)
Reserved
Reserved
7-15

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