Host Processor Interface - Motorola DSP56303 User Manual

Features
6.1.2

Host Processor Interface

n
Sixteen signals support non-multiplexed or multiplexed buses:
– /
H[0–7] HAD[0–7]
( )
HAD[0–7]
– / address strobe (
HAS HA0
– / host address line (
HA8 HA1
– / host address line (
HA9 HA2
– /
HRW HRD
– /
HDS HWR
– /
HCS HA10
– /
HREQ HTRQ
– /
HACK HRRQ
Note: The signals in the above list that are shown as asserted low (for example,
have programmable polarity. The default value following reset is shown in the
above list.
n
Mapping:
– HI08 registers are mapped into eight consecutive locations in the host's external
bus address space.
– The HI08 acts as a memory or I/O-mapped peripheral for microprocessors,
microcontrollers, and so forth.
n
Transfer modes:
– Mixed 8-bit, 16-bit, and 24-bit data transfers
— DSP-to-host
— Host-to-DSP
– Host command
n
Handshaking protocols:
– Software polled
– Interrupt-driven (Interrupts are compatible with most processors, including the
MC68000, 8051, HC11, and Hitachi H8.)
n
Data word: 8 bits
6-2
host data bus (
H[0–7]
) or host address line (
HAS
HA8
HA9
read/write select (
HRW
data strobe ( ) or write strobe (
HDS
host chip select (
HCS
host request (
HREQ
host acknowledge (
DSP56303 User's Manual
) or host multiplexed address/data bus
HA0
) or host address line (
) or host address line (
) or read strobe (
HRD
)
HWR
) or host address line (
) or host transmit request (
) or host receive request (
HACK
)
)
HA1
)
HA2
)
)
HA10
)
HTRQ
)
HRRQ
HRD
) all