Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual page 80

Us
Table i. Changes to MPC8260 Family Reference Manual , Rev. 1
Substantive Changes
Additional New
functionality chapter
Existing
chapter
Errata (documentation)
Chapter updates
Some descriptions in this manual pertain only to specific devices or to all devices in a specific silicon
revision. Table ii provides examples of how these descriptions are indicated. Users should verify whether
a given portion of this manual pertains to their device.
Format
Text interrupt notes Placed at beginning of sections or chapters. Indicates that all
the information within that section or chapter pertains only to
specific devices.
Note: This notation format is also used within chapters to
lxxviii
Description
Previous supplemental documents supported
functionality not available on the original PowerQUICC II.
They have been incorporated into this manual.
Note: The "References" list is a complete list.
Information from these previous supplemental
documents has also been incorporated into existing
chapters. This information includes new sections
(Section 10.4.3, "PCI Bridge
(Section 5.4.1, "Hard Reset Configuration
Note: The "References" list includes the chapters that
contain the greatest additions, but it does not list
every chapter that has additions.
Incorporation of Errata to MPC8260 User's Manual
(MPC8260UMAD/D). Errata that were not included in the
last version of MPC8260UMAD/D (Rev. 6, 10/2002) are
indicated in Appendix B.
Includes new or updated content as well as
organizational changes.
Note: The "References" list includes the chapters that
contain the greatest additions, but it does not list
every chapter that has been updated.
Table ii. Device- and Silicon-Specific Notations
Usage
stress information that is common to all devices.
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Clocking") to single bits
Word").
Beginning of
"Multi-Channel Controllers
(MCCs)"
References
• Chapter 9, "PCI Bridge"
• Chapter 31, "ATM AAL1 Circuit
Emulation Service"
• Chapter 32, "ATM AAL2"
• Chapter 33, "Inverse
Multiplexing for ATM (IMA)"
• Chapter 34, "ATM
Transmission Convergence
Layer"
• Chapter 1, "Overview"
• Chapter 3, "Memory Map"
• Chapter 6, "External Signals"
• Chapter 4, "System Interface
Unit (SIU)"
• Chapter 28, "Multi-Channel
Controllers (MCCs)"
• Chapter 40, "Parallel I/O Ports"
• Appendix B, "Reference
Manual (Rev 1) Errata"
• Chapter 10, "Clocks and Power
Control"
• Chapter 28, "Multi-Channel
Controllers (MCCs)"
Example
Chapter 28,
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