Paragraph
Number
19.5.2
19.5.2.1
Dual-Address Transfers ....................................................................................... 19-10
19.5.2.1.1
19.5.2.1.2
19.5.2.2
Single Address (Fly-By) Transfers ...................................................................... 19-10
19.5.2.2.1
19.5.2.2.2
19.5.3
19.5.4
19.6
IDMA Priorities ........................................................................................................... 19-13
19.7
IDMA Interface Signals............................................................................................... 19-13
19.7.1
DREQx and DACKx ............................................................................................... 19-13
19.7.1.1
Level-Sensitive Mode.......................................................................................... 19-14
19.7.1.2
Edge-Sensitive Mode........................................................................................... 19-15
19.7.2
DONEx .................................................................................................................... 19-15
19.8
IDMA Operation.......................................................................................................... 19-16
19.8.1
19.8.2
IDMAx Parameter RAM ......................................................................................... 19-17
19.8.2.1
19.8.2.2
19.8.2.3
19.8.3
IDMA Performance ................................................................................................. 19-23
19.8.4
19.8.5
IDMA BDs............................................................................................................... 19-24
19.9
IDMA Commands........................................................................................................ 19-27
19.9.1
start_idma Command............................................................................................... 19-27
19.9.2
stop_idma Command ............................................................................................... 19-28
19.10
IDMA Bus Exceptions................................................................................................. 19-28
19.10.1
19.11
19.12
19.12.1
Peripheral-to-Memory Mode (60x Bus to Local Bus)-IDMA2 ............................ 19-30
19.12.2
Memory-to-Peripheral Fly-By Mode-IDMA3 ...................................................... 19-32
19.12.3
Memory-to-Memory (PCI Bus to 60x Bus)-IDMA1 ............................................ 19-33
20.1
Features .......................................................................................................................... 20-2
20.1.1
20.1.2
xxii
Contents
Peripheral to Memory ...................................................................................... 19-10
Memory to Peripheral ...................................................................................... 19-10
Serial Communications Controllers (SCCs)
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Title
Chapter 20
Page
Number
Freescale Semiconductor