Mcc Exceptions - Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual

Command
1
Performs both INIT RX and INIT TX commands contiguously, using the channel number supplied
INIT RX AND TX
with the command.
1
Initializes MCC receive FIFOs in groups of 32 channels, starting with the channel number
INIT RX
programmed in the CPCR[MCN] field when the command is issued. This command should only be
issued when the channels are disabled. To initialize more than 32 channels, reissue the command
with the appropriate channel numbers. The INIT TX AND RX command may be used to initialize
both the receive and transmit sides of an MCC channel at the same time. Note that this command
will initialize the first 16 FIFOs to be preloaded with 16 bits of idle, and the second set of FIFOs will
be completely empty and ready for data. This is done to stagger when FIFOs require servicing and
spread out CPM loading.
1
Initializes MCC transmit FIFOs in groups of 32 channels, starting with the channel number
INIT TX
programmed in the CPCR[MCN] field when the command is issued. This command should only be
issued when the channels are disabled. To initialize more than 32 channels, reissue the command
with the appropriate channel numbers. The INIT TX AND RX command may be used to initialize
both the receive and transmit sides of an MCC channel at the same time. Note that this command
will initialize the first 16 FIFOs to be preloaded with 16 bits of idle, and the second set of FIFOs will
be preloaded with 32 bits of idle. This is done to stagger when FIFOs require servicing and spread
out CPM loading.
1,2
Same as regular INIT RX AND TX, except that all FIFOs are equally preloaded with idle. For
INIT TX AND RX
(16 ) applications in which all channels must begin sending or receiving data in the same TDM frame.
BITS
1,2
, Performs the INIT TX command but only for the channel number programmed in CPCR[MCN] as
INIT TX ONE
opposed to initializing 32 channels at once.
CHANNEL
1,2
R , Performs the INIT RX command but only for the channel number programmed in CPCR[MCN] as
INIT X ONE
opposed to initializing 32 channels at once.
CHANNEL
2
Initializes the state machine hardware of the MCC indicated in CPCR[PAGE] and CPCR[SBC], has
MCC RESET
the same effect on the MCC block that a CPM reset does. Required after the GUN or GOV MCC
event occurs. If this command is not available in the revision of silicon being used, a CPM reset is
required instead.
Disables the transmission on the selected channel and clears CHAMR[POL]. When this command
STOP TRANSMIT
is issued in the middle of a frame, the CP sends an ABORT indication and then idles/flags on the
selected channel. If this command is issued between frames, the CP sends only idles or flags
(depending on CHAMR[IDLM]). TBPTR points for the buffer that the CP was using when the
TRANSMIT
Forces the receiver of the selected channel to terminate reception. After this command is executed,
STOP RECEIVE
the CP does not change the receive parameters in the dual-port RAM. The user must initialize the
channel receive parameters in order to restart reception.
1
The
INIT PARAMETERS
be issued to cover any channel number used, whether used normally or as part of a superchannel
2
This command only available on .29µm (HiP3) Revision B.3 and subsequent silicon.
28.8

MCC Exceptions

The MCC interrupt reporting scheme has two levels. The circular interrupt tables (illustrated in
Figure 28-18) report channel-specific events and are masked by each channel's INTMSK field located in
channel-specific parameter RAM. The MCCE global event register (described in
Freescale Semiconductor
Table 28-17. MCC Commands
command was issued.
style commands are also used to reset the MCC channel FIFOs and these commands need to
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Description
Multi-Channel Controllers (MCCs)
STOP
Section 28.8.1, "MCC
28-35