Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual page 167

Address
(offset)
0x11A78– Reserved
0x11A7F
0x11A82 SMC1 mode register (SMCMR1)
0x11A84 Reserved
0x11A86 SMC1 event register (SMCE1)
0x11A87 Reserved
0x11A8A SMC1 mask register (SMCM1)
0x11A8B– Reserved
0x11A91
0x11A92 SMC2 mode register (SMCMR2)
0x11A94 Reserved
0x11A96 SMC2 event register (SMCE2)
0x11A97 Reserved
0x11A9A SMC2 mask register (SMCM2)
0x11A9B– Reserved
0x11A9F
0x11AA0 SPI mode register (SPMODE)
0x11AA2 Reserved
0x11AA6 SPI event register (SPIE)
0x11AA7 Reserved
0x11AAA SPI mask register (SPIM)
0x11AAB Reserved
0x11AAD SPI command register (SPCOM)
0x11AAE– Reserved
0x11AFF
0x11B00 CPM mux SI1 clock route register (CMXSI1CR)
0x11B02 CPM mux SI2 clock route register (CMXSI2CR)
Freescale Semiconductor
Table 3-1. Internal Memory Map (continued)
Register
CPM Mux
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
R/W Size
— 8 bytes
SMC1
R/W 16 bits
— 16 bits
R/W 8 bits
— 24 bits
R/W 8 bits
— 7 bytes
SMC2
R/W 16 bits
— 16 bits
R/W 8 bits
— 24 bits
R/W 8 bits
— 5 bytes
SPI
R/W 16 bits
— 4 bytes
R/W 8 bits
— 24 bits
R/W 8 bits
— 24 bits
W 8 bits
— 82 bytes
R/W 8 bits
R/W 8 bits
Memory Map
Reset Section/Page
— —
0x0000 27.2.1/27-2
— —
0x00 27.3.11/27-18
(UART)
—
27.4.10/27-28
(Transparent)
0x00
27.5.9/27-34
(GCI)
— —
0x0000 27.2.1/27-2
— —
0x00 27.3.11/27-18
(UART)
—
27.4.10/27-28
(Transparent)
0x00
27.5.9/27-34
(GCI)
— —
0x0000 38.4.1/38-6
— —
0x00 38.4.2/38-9
— —
0x00 38.4.2/38-9
— —
0x00 38.4.3/38-10
— —
0x00 16.4.2/16-12
0x00 16.4.3/16-12
3-21