Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual page 294

The 60x Bus
16-, or 24-byte extended transfers. These transactions are compatible with the 60x bus, but some slaves or
masters do not support these features. Clear BCR[ETM] to disable this type of transaction. This places the
PowerQUICC II in strict 60x bus mode. The following tables are extensions to
Table 8-9.
Table 8-10 lists the patterns of the extended data transfer for write cycles when PowerQUICC II initiates
an access. Note that 16- and 24-byte transfers are always eight-byte aligned and use a 64-bit or less port
size.
Transfer Address
Size State
TSIZ[0–3]) A[29–31]
5 Bytes 000
(0101)
011
6 Bytes 000
(0110)
010
7 Bytes 000
(0111)
001
Table 8-11 lists the bytes required on the data bus for extended read cycles. Note that 16- and 24-byte
transfers are always 8-byte aligned and use a maximum 64-bit port size.
Table 8-11. Data Bus Requirements for Extended Read Cycles
Addres
Transfer
s State
Size
A[29-31
TSIZ[0–3]
]
5 Byte 000
(0101)
011
6 Byte 000
(0110)
010
7 Byte 000
(0111)
001
Table 8-12 includes added states to the transfer size calculation state machine. Only extended transfers use
these states.
8-20
Table 8-10. Data Bus Contents for Extended Write Cycles
D[0–7] D[8–15] D[16–23] D[24–31] D[32–39] D[40–47] D[48–55] D[56–63]
OP0 OP1
OP3 OP3
OP0 OP1
OP2 OP3
OP0 OP1
OP1 OP1
64-Bit
0–7 8–15 16–2 24–3 32–3
3 1 9
OP OP OP2 OP3 OP4
0 1
— — — OP3 OP4 OP5 OP6 OP7
OP OP OP2 OP3 OP4 OP5
0 1
— — OP2 OP3 OP4 OP5 OP6 OP7
OP OP OP2 OP3 OP4 OP5 OP6
0 1
— OP OP2 OP3 OP4 OP5 OP6 OP7
1
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
External Data Bus Pattern
OP2 OP3 OP4
— OP3 OP4
OP2 OP3 OP4
OP2 OP3 OP4
OP2 OP3 OP4
OP2 OP3 OP4
Port Size/Data Bus Assignments
40–4 48–5 56–6 0–7
7 5 3
— — — OP
0
—
— — OP
0
—
— OP
0
—
Table 8-7, Table
— —
OP5 OP6
OP5 —
OP5 OP6
OP5 OP6
OP5 OP6
32-Bit 16-Bit
8–15 16–2 24–3 0–7 8–15
3 1
OP1 OP2 OP3 OP0 OP1 OP0
— — OP3 — OP3 OP3
OP1 OP2 OP3 OP0 OP1 OP0
— OP2 OP3 OP2 OP3 OP2
OP1 OP2 OP3 OP0 OP1 OP0
OP1 OP2 OP3 — OP1 OP1
Freescale Semiconductor
8-8, and
—
OP7
—
OP7
—
OP7
8-Bit
0–7