Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual page 30

Paragraph
Number
27.4.11 SMC Transparent NMSI Programming Example.................................................... 27-29
27.5 The SMC in GCI Mode ............................................................................................... 27-30
27.5.1 SMC GCI Parameter RAM...................................................................................... 27-30
27.5.2 Handling the GCI Monitor Channel ........................................................................ 27-31
27.5.2.1 SMC GCI Monitor Channel Transmission Process ............................................. 27-31
27.5.2.2 SMC GCI Monitor Channel Reception Process .................................................. 27-31
27.5.3 Handling the GCI C/I Channel ................................................................................ 27-32
27.5.3.1 SMC GCI C/I Channel Transmission Process ..................................................... 27-32
27.5.3.2 SMC GCI C/I Channel Reception Process .......................................................... 27-32
27.5.4 SMC GCI Commands.............................................................................................. 27-32
27.5.5 SMC GCI Monitor Channel RxBD ......................................................................... 27-32
27.5.6 SMC GCI Monitor Channel TxBD.......................................................................... 27-33
27.5.7 SMC GCI C/I Channel RxBD ................................................................................. 27-33
27.5.8 SMC GCI C/I Channel TxBD.................................................................................. 27-34
27.5.9 SMC GCI Event Register (SMCE)/Mask Register (SMCM).................................. 27-34
28.1 MCC Operation Overview............................................................................................. 28-2
28.1.1 MCC Data Structure Organization............................................................................. 28-2
28.2 Global MCC Parameters ................................................................................................ 28-4
28.3 Channel-Specific Parameters ......................................................................................... 28-5
28.3.1 Channel-Specific HDLC Parameters ......................................................................... 28-5
28.3.1.1 Internal Transmitter State (TSTATE)-HDLC Mode ........................................... 28-7
28.3.1.2 Interrupt Mask (INTMSK)-HDLC Mode ........................................................... 28-8
28.3.1.3 Channel Mode Register (CHAMR)-HDLC Mode.............................................. 28-8
28.3.1.4 Internal Receiver State (RSTATE)-HDLC Mode ............................................. 28-10
28.3.2 Channel-Specific Transparent Parameters ............................................................... 28-11
28.3.2.1 Internal Transmitter State (TSTATE)-Transparent Mode ................................. 28-12
28.3.2.2 Interrupt Mask (INTMSK)-Transparent Mode ................................................. 28-12
28.3.2.3 Channel Mode Register (CHAMR)-Transparent Mode.................................... 28-13
28.3.2.4 Internal Receiver State (RSTATE)-Transparent Mode ..................................... 28-14
28.3.3 MCC Parameters for AAL1 CES Usage.................................................................. 28-14
28.3.3.1 Channel-Specific Parameters-AAL1 CES ........................................................ 28-15
28.3.3.1.1
28.3.3.2 Channel Mode Register (CHAMR)-AAL1 CES .............................................. 28-15
28.3.4 Channel-Specific SS7 Parameters ........................................................................... 28-17
28.3.4.1 Extended Channel Mode Register (ECHAMR)-SS7 Mode.............................. 28-21
28.3.4.2 Signal Unit Error Monitor (SUERM)-SS7 Mode ............................................. 28-23
28.3.4.2.1
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Contents
Multi-Channel Controllers (MCCs)
Interrupt Circular Table Entry and Interrupt Mask (INTMSK)-AAL1 CES 28-15
SUERM in Japanese SS7................................................................................. 28-23
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Title
Chapter 28
Page
Number
Freescale Semiconductor