Operation; Interval Timer Mode - NEC V850ES/F 3-L Series User Manual

Chapter 11
Note

11.4 Operation

11.4.1 Interval timer mode

Figure 11-2
Caution
374
f : Main system clock frequency
XX
f : Low frequency internal oscillator clock frequency (240 KHz)
RL
f : High frequency internal oscillator clock frequency (8 MHz)
RH
f : Sub oscillator frequency
XT
In the interval timer mode, a match interrupt signal (INTTM0EQ0) is output
when the value of the 16-bit counter matches the value of TMM0 compare
register 0 (TM0CMP0). At the same time, the counter is cleared to 0000
starts counting up.
When FFFF is set to the TM0CMP0 register, Timer M performs an operation
H
similar to that in the free-running mode.
Timing of operation in interval timer mode
To set M clocks as the interval period, set the TM0CMP0 register to M – 1.
User's Manual U18743EE1V2UM00
16-Bit Interval Timer M
and
H
R