Port Group Dl - NEC V850ES/F 3-L Series User Manual

Pin Functions

2.5.13 Port group DL

Table 2-37
Table 2-38
Register Address
PMDLL FFFF F024
a
PMDLH FFFF F025
a
PMDL (16 bit) FFFF F024
PDLL FFFF F004
a
PDLH FFFF F005
a
PDL (16 bit) FFFF F004
a)
not available for V850ES/FE3-L
b)
not available for V850ES/FE3-L, V850ES/FF3-L
Access
Port group DL is an 16-bit input/output port group.
Port group DL includes the following pins:
Port group DL: pin functions and buffer types
Pin functions in different modes
Port mode Alternative mode
(PMCnm = 0) (PMCnm = 1)
PDL0
PDL1
PDL2
PDL3
PDL4
PDL5 FLMD1 (I)
PDL6
PDL7
c
PDL8
c
PDL9
c
PDL10
c
PDL11
d
PDL12
c
PDL13
a)
A: analog noise filter; B: analog and digital noise filter; –: no noise filter
b)
S1: Schmitt trigger (30/70%); S2: Schmitt trigger (40/80%); x: CMOS
c)
not available for V850ES/FE3-L
d)
not available for V850ES/FE3-L, V850ES/FF3-L
Port group DL: configuration registers
Initial
Used bits
value
FF PMDL7 PMDL6
H H
FF X X
H H
FFFF PMDL15 to PMDL8 (PMDLH)
H H
undefined PDL7 PDL6
H
undefined X X
H
undefined PDL15 to PDL8 (PDLH)
H
All 8-bit registers can be accessed in 8-bit or 1-bit units.
All 16-bit registers can be accessed in 16-bit units.
User's Manual U18743EE1V2UM00
Pin
function
after reset
– PDL0 (I)
– PDL1 (I)
– PDL2 (I)
– PDL3 (I)
– PDL4 (I)
PDL5 (I)
– PDL6 (I)
– PDL7 (I)
– PDL8 (I)
– PDL9 (I)
– PDL10 (I)
– PDL11 (I)
– PDL12 (I)
– PDL13 (I)
PMDL5 PMDL4 PMDL3
b b
PMDL13 PMDL12 PMDL11
PDL5 PDL4 PDL3
b b
PDL13 PDL12 PDL11
Chapter 2
Port Noise Input
a
type filter charact.
C – S2
C – S2
C – S2
C – S2
C – S2
C – S2
C – S2
C – S2
C – S2
C – S2
C – S2
C – S2
C – S2
C – S2
PMDL2 PMDL1 PMDL0
a a
PMDL10 PMDL9 PMDL8
PMDL7 to PMDL0 (PMDLL)
PDL2 PDL1 PDL0
a a
PDL10 PDL9 PDL8
PDL7 to PDL0 (PDLL)
b
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