NEC V850ES/F 3-L Series User Manual page 203

Clock Generator
Table 4-30
Releasing Source
Non-maskable interrupt request
signal
Maskable interrupt request signal
(a) Release by non-maskable interrupt request or unmasked maskable
interrupt request
The IDLE2 mode is released by a non-maskable interrupt request signal or an
unmasked maskable interrupt request signal, regardless of the priority of the
interrupt request signal. If the IDLE2 mode is set in an interrupt routine,
however, the operation is performed as follows:
• If an interrupt request signal having a priority lower than that of the interrupt
request currently being serviced is generated, the IDLE2 mode is released,
but the interrupt request with the lower priority is not acknowledged. The
interrupt request signal itself is held.
• If an interrupt request signal (including a non-maskable interrupt request
signal) has a priority higher than that of the interrupt request currently being
serviced is generated, the IDLE2 mode is released, and this interrupt
request signal is acknowledged.
Operation after IDLE2 mode is released by interrupt request signal
Interrupt Enabled (EI) Status
Execution branches to the handler address after the specified setup
time has elapsed.
Execution branches to the handler
address, or the next instruction is
executed after the specified setup
time has elapsed.
(b) Releasing by RESET input
The operation is the same as the normal reset operation.
(c) Securing setup time after release of IDLE2 mode
Secure the setup time of ROM (flash memory) after releasing the IDLE2 mode.
• Releasing by non-maskable interrupt request signal or unmasked maskable
interrupt request signal:
The setup time is secured by setting the OSTS register.
When a source that releases the IDLE2 mode occurs, an internal dedicated
timer starts counting in accordance with the setting of the OSTS register.
When this counter overflows, the normal operation mode is restored.
• Releasing by reset input (RESET pin input or WDT2RES occurrence)
The operation is the same as the normal reset operation.
The oscillation stabilization time is the default value of the OSTS
16
register, 2 / f .
X
User's Manual U18743EE1V2UM00
Chapter 4
Interrupt Disabled (DI) Status
The next instruction is executed
after the specified setup time has
elapsed.
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