Arbitration - NEC V850ES/F 3-L Series User Manual

32-bit single-chip microcontroller
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2
I
C Bus (IIC)

17.12 Arbitration

Master 1
SCL0n
SDA0n
Master 2
SCL0n
SDA0n
Transfer lines
SCL0n
SDA0n
Figure 17-13
When several master devices simultaneously output a start condition (when
the IICCn.STTn bit is set to 1 before the IICSn.STDn bit is set to 1),
communication between the master devices is performed while the number of
clocks is adjusted until the data differs. This kind of operation is called
arbitration.
When one of the master devices loses in arbitration, an arbitration loss flag
(IICSn.ALDn bit) is set to 1 via the timing by which the arbitration loss
occurred, and the SCL0n and SDA0n lines are both set to high impedance,
which releases the bus.
Arbitration loss is detected based on the timing of the next interrupt request
signal (the eighth or ninth clock, when a stop condition is detected, etc.) and
the setting of the ALDn bit to 1, which is made by software.
For details of interrupt request timing, see"I
(INTIICn)" on page 488.
Arbitration timing example
User's Manual U18743EE1V2UM00
2
C Interrupt Request Signals
Hi-Z
Hi-Z
Master 1 loses arbitration
Chapter 17
509

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