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Chapter 15
(7)
(8)
402
UDnRX - UARTDn receive data register
The UDnRX register is an 8-bit buffer register that stores parallel data
converted by the receive shift register.
The data stored in the receive shift register is transferred to the UDnRX
register upon completion of reception of 1 byte of data.
During LSB-first reception when the data length has been specified as 7 bits,
the receive data is transferred to bits 6 to 0 of the UDnRX register and the MSB
always becomes 0. During MSB-first reception, the receive data is transferred
to bits 7 to 1 of the UDnRX register and the LSB always becomes 0.
When an overrun error (UDnOVE) occurs, the receive data at this time is not
transferred to the UDnRX register and is discarded.
This register is read-only, in 8-bit units.
In addition to reset input, the UDnRX register can be set to FFH by clearing the
UDnCTL0.UDnPWR bit to 0.
After reset: FFH
R
6
7
UDnRX
UDnTX - UARTDn transmit data register
The UDnTX register is an 8-bit register used to set transmit data.
This register can be read or written in 8-bit units.
Reset input sets this register to FFH.
After reset: FFH
R/W
6
7
UDnTX
When the transmission is enabled (UDnPWR = 1 and UDnTXE = 1) the write
to the UDnTX register triggers the start of the transmission.
Be sure to execute the transmit data write during transmission after the
transmission interrupt request (INTUDnT) is generated.
If the the next data is written before the transmission is completed the
continuous transmission is enabled.
User's Manual U18743EE1V2UM00
Asynchronous Serial Interface (UARTD)
Address: UD0RX FFFFFA06H, UD1RX FFFFFA16H,
UD2RX FFFFFA26H, UD3RX FFFFFA36H ,
UD4RX FFFFFA46H
5
4
Address : UD0TX FFFFFA07H, UD1TX FFFFFA17H,
UD2TX FFFFFA27H, UD3TX FFFFFA37H,
UD4TX FFFFFA47H
5
4
3
2
1
3
2
1
0
0
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