Configuration - NEC V850ES/F 3-L Series User Manual

32-bit single-chip microcontroller

Table of Contents

15.2 Configuration

Note: External clock ASCKD0 is only available for UARTD0

• On-chip dedicated baud rate generator

• MSB-/LSB-first transfer selectable

• Transmit/receive data inverted input/output possible

• 13 to 20 bits selectable for the SBF (Sync Break Field) in the LIN (Local

Interconnect Network) communication format

– Recognition of 11 bits or more possible for SBF reception in LIN

communication format

– SBF reception flag provided

• SBF reception can be detected during data communication.

• Bus monitor function to keep data consistency of the transmit data

The block diagram of the UARTDn is shown below.

Reception unit

Receive shift

Send and receive

data comparison

Block diagram of Asynchronous Serial Interface UARTDn

For the configuration of the baud rate generator, see Figure 15-11 on

User's Manual U18743EE1V2UM00

Asynchronous Serial Interface (UARTD)

Internal bus

Transmission unit

Transmission

Internal bus

shift register