Receive Data Read - NEC V850ES/F 3-L Series User Manual

32-bit single-chip microcontroller
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CAN Controller (CAN)

18.9.2 Receive data read

CAN std ID format
DN
MUC
CINTS1
INTREC1
Operation of the CAN contoroller
Figure 18-28
To keep data consistency when reading CAN message buffers, perform the
data reading according to Figure 18-49 on page 651 to Figure 18-51 on
page 653.
During message reception, the CAN module sets DN of the CnMCTRLm
register two times: at the beginning of the storage process of data to the
message buffer, and again at the end of this storage process. During this
storage process, the MUC bit of the CnMCTRLm register of the message
buffer is set. (Refer to Figure 18-28 on page 603.)
The receive history list is also updated just before the storgage process. In
addition, during storage process (MUC = 1), the RDY bit of the CnMCTRL
register of the message buffer is locked to avoid the coincidental data WR by
CPU. Note the storage process may be disturbed (delayed) when the CPU
accesses the message buffer.
ID
DLC
DATA0-DATA7
(1)
(11)
(1)
(1)
(1)
(4)
(0-64)
DN and MUC bit setting period (for standard ID format)
User's Manual U18743EE1V2UM00
IFS
CRC
ACK EOF
(16)
(2)
(7)
Message Store
MDATA,MDLC.MIDx- > MBUF
Set DN & MUC
at the same time
Chapter 18
Recessive
Dominant
Set DN & clear MUC
at the same timing
603

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