NEC V850ES/F 3-L Series User Manual page 569

32-bit single-chip microcontroller
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CAN Controller (CAN)
Access
Address
Initial Value
Access
Address
Initial Value
CMID28 to CMID0
Mask pattern setting of ID bit
The ID bits of the message buffer set by the CMID28 to CMID0 bits are compared with the
0
ID bits of the received message frame.
The ID bits of the message buffer set by the CMID28 to CMID0 bits are not compared with
1
the ID bits of the received message frame (they are masked).
Note
(c) CANn module mask 3 register (CnMASK3L, CnMASK3H)
These registers can be read/written in 16-bit units.
CnMASK3L: <CnRBaseAddr> + 048
CnMASK3H: <CnRBaseAddr> + 04A
Undefined.
CnMASK3L
15
14
CMID15
CMID14
CMID13
7
6
CMID7
CMID6
CMID5
CnMASK3H
15
14
0
0
7
6
CMID23
CMID22
CMID21
(d) CANn module mask 4 register (CnMASK4L, CnMASK4H)
These registers can be read/written in 16-bit units.
CnMASK4L: <CnRBaseAddr> + 04C
CnMASK4H: <CnRBaseAddr> + 04E
Undefined.
CnMASK4L
15
14
CMID15
CMID14
CMID13
7
6
CMID7
CMID6
CMID5
CnMASK4H
15
14
0
0
7
6
CMID23
CMID22
CMID21
Masking is always defined by an ID length of 29 bits. If a mask is assigned to a
message with a standard ID, the CMID17 to CMID0 bits are ignored.
Therefore, only the CMID28 to CMID18 bits of the received ID are masked.
The same mask can be used for both the standard and extended IDs.
User's Manual U18743EE1V2UM00
H
H
13
12
11
CMID12
CMID11
5
4
3
CMID4
CMID3
13
12
11
0
CMID28
CMID27
5
4
3
CMID20
CMID19
H
H
13
12
11
CMID12
CMID11
5
4
3
CMID4
CMID3
13
12
11
0
CMID28
CMID27
5
4
3
CMID20
CMID19
Chapter 18
10
9
CMID10
CMID9
CMID8
2
1
CMID2
CMID1
CMID0
10
9
CMID26
CMID25
CMID24
2
1
CMID18
CMID17
CMID16
10
9
CMID10
CMID9
CMID8
2
1
CMID2
CMID1
CMID0
10
9
CMID26
CMID25
CMID24
2
1
CMID18
CMID17
CMID16
8
0
8
0
8
0
8
0
569

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