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2
I
C Bus (IIC)
Processing by master device
IICn
ACKDn
STDn
SPDn
WTIMn
H
ACKEn
MSTSn
STTn
SPTn
WRELn
INTIICn
TRCn
Transfer lines
SCL0n
SDA0n
Processing by slave device
IICn
ACKDn
STDn
SPDn
WTIMn
H
H
ACKEn
MSTSn
L
STTn
L
SPTn
L
WRELn
INTIICn
TRCn
Figure 17-24
Note
←
IICn
FFH Note
Note
1
2
3
4
5
D7D6D5D4D3D2D1D0AD5
←
IICn
data
Example of slave to master communication
(when 9-clock wait is selected for both master and slave) (3/3)
(c) stop condition
To cancel master wait, write FFH to IICn or set WRELn.
User's Manual U18743EE1V2UM00
6
7
8
9
2
N- ACK
Chapter 17
←
IICn
address
(When SPIEn = 1)
1
AD6
Stop
Start
condition
condition
(When SPIEn = 1)
525
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