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Clock Generator
(4)
Access
Address
Initial Value
Table 4-7
Bit position
Bit name
4 to 0
OSTS[4:0]
a)
Bit OSTS4 is only valid during IDLE2 mode release. In case of shifting to the STOP mode at OSTS4 bit = 1,
the oscillation stabilization time after STOP mode release is the set period of the OSTS3-0 bits (OSTS4 bit is
considered as 0).
OSTS - Oscillation stabilization time select register
The 8-bit OSTS register specifies the oscillation stabilization time following
reset release or release of the STOP mode.
The oscillation stabilization time and setup time are required when the STOP
mode and IDLE mode are released, respectively.
This register can be read/written in 1-bit or 8-bit units.
FFFF F6C0
.
H
06
. The register is initialized by any reset.
H
7
6
5
0
0
0
R
R
R
OSTS register contents
Time selection:
OSTS4
OSTS3
a
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
User's Manual U18743EE1V2UM00
4
3
2
OSTS4 OSTS3 OSTS2
R/W
R/W
R/W
Function
OSTS2
OSTS1
OSTS0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
1
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
1
Chapter 4
1
0
OSTS1
OSTS0
R/W
R/W
Selection of oscillation
stabilization / setup time
10
2
/fx
11
2
/fx
12
2
/fx
13
2
/fx
14
2
/fx
15
2
/fx
16
2
/fx
17
2
/fx
18
2
/fx
19
2
/fx
20
2
/fx
21
2
/fx
Setting prohibited
Setting prohibited
4
2
/fx
5
2
/fx
6
2
/fx
7
2
/fx
8
2
/fx
9
2
/fx
10
2
/fx
11
2
/fx
12
2
/fx
13
2
/fx
b
171
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