NEC V850ES/F 3-L Series User Manual page 332

32-bit single-chip microcontroller

Table of Contents

The 16-bit counter is not cleared when its value matches the value of

Basic operation timing in interval timer mode

when D1 > D2 > D3; only TAAnCCR0 register value is written, and

TOAAn0 and TOAAn1 are not output

(TAAnOE0 = 0, TAAnOE1 = 0, TAAnOL0 = 0, TAAnOL1 = 1)

The 16-bit counter is not cleared when its value matches the value of

D1, D2: Setting values of TAAnCCR0 register (0000H to FFFFH)

D3: Setting value of TAAnCCR1 register (0000H to FFFFH)

)= (Dn + 1) × (count clock cycle)

Interval time (t

User's Manual U18743EE1V2UM00

16-Bit Timer/Event Counter AA