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Chapter 18
18.6 Bit Set/Clear Function
560
The CAN control registers include registers whose bits can be set or cleared
via the CPU and via the CAN interface. An operation error occurs if the
following registers are written directly. Do not write any values directly via bit
manipulation, read/modify/write, or direct writing of target values.
• CANn global control register (CnGMCTRL)
• CANn global automatic block transmission control register (CnGMABT)
• CANn module control register (CnCTRL)
• CANn module interrupt enable register (CnIE)
• CANn module interrupt status register (CnINTS)
• CANn module receive history list register (CnRGPT)
• CANn module transmit history list register (CnTGPT)
• CANn module time stamp register (CnTS)
• CANn message control register (CnMCTRLm)
All the 16 bits in the above registers can be read via the usual method. Use the
procedure described in Figure 18-23 below to set or clear the lower 8 bits in
these registers.
Setting or clearing of lower 8 bits in the above registers is performed in
combination with the higher 8 bits (refer to the bit status after set/clear
operation is specified in Figure 18-26). Figure 18-23 shows how the values of
set bits or clear bits relate to set/clear/no change operations in the
corresponding register.
User's Manual U18743EE1V2UM00
CAN Controller (CAN)
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