NEC V850ES/F 3-L Series User Manual page 396

Chapter 15
Note
(2)
(3)
396
UDnDIR
0
MSB-first transfer
1
LSB-first transfer
This register can be rewritten only when the UDnPWR bit = 0 or the UDnTXE bit =
the UDnRXE bit = 0.
When the transmission/reception is performed in the LIN format, set the
UDnDIR bit to 1.
UDnPS1 UDnPS0
0
0
1
1
• This register is rewritten only when the UDnPWR bit = 0 or the UDnTXE bit = the
UDnRXE bit = 0.
• If "Reception with 0 parity" is selected during reception, a parity check is not performed.
Therefore, since the UDnSTR.UDnPE bit is not set, no error interrupt is output.
• When transmission and reception are performed in the LIN format, clear the
UDnPS1 and UDnPS0 bits to 00.
UDnCL Specification of data character length of 1 frame of transmit/receive data
0
7 bits
1
8 bits
• This register can be rewritten only when the UDnPWR bit = 0 or the UDnTXE bit =
the UDnRXE bit = 0.
• When the transmission/reception is performed in the LIN format, set the
UDnCL bit to 1.
UDnSL
0 1 bit
1 2 bits
This register can be rewritten only when the UDnPWR bit = 0 or the UDnTXE bit =
the UDnRXE bit = 0.
For details of parity, see "Parity types and operations" on page 416.
UDnCTL1- UARTDn control register 1
For details, see "UDnCTL1 - UARTDn control register 1" on page 420.
UDnCTL2 - UARTDn control register 2
For details, see "UDnCTL2 - UARTDn control register 2" on page 421.
User's Manual U18743EE1V2UM00
Asynchronous Serial Interface (UARTD)
Transfer direction selection
Parity selection during transmission Parity selection during reception
0 No parity output
1 0 parity output
0 Odd parity output
1 Even parity output
Specification of length of stop bit for transmit data
Reception with no parity
Reception with 0 parity
Odd parity check
Even parity check