NEC V850ES/F 3-L Series User Manual page 214

32-bit single-chip microcontroller
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Chapter 4
Note
214
In this example, maskable interrupts are permitted to leave the power save
mode.
3.
// xxIC.xxMK = 0
4.
// xxIC.xxMK = 1
5.
di
6.
mov
0x02,r10
7.
st.b
10,PSMR[r0]
8.
mov
0x62,r10
9.
st.b
r10,PRCMD[r0]
10.
st.b
r10,PSC[r0]
11.
nop
12.
nop
13.
nop
14.
nop
15.
nop
16.
17.
// xxIC.xxIF = 0
18.
ei
Be aware of the following notes when entering power save mode using the
above sequence:
1.
It is recommended to disable maskable interrupt acknowledgement in
general by the "di" instruction (step 3.) to prevent any pending interrupt
from being served during the power save mode set-up procedure. This
makes it also possible to completely control the process after wake-up,
since no pending interrupt will be unintentional acknowledged. Before
enabling interrupt acknowledgement by the "ei" instruction (step 16.) after
wake-up, all unwanted interrupts can be discarded by setting xxIC.xxIF = 0
(step 15.).
Since the wake-up capability of the unmasked wake-up interrupts is not
affected by "di", such interrupts shall be masked (step 1.) by
IMRm.xxMK = 1.
2.
The store instruction to PRCMD will not allow to acknowledge any interrupt
until processing of the subsequent instruction is complete. That means, an
interrupt will not be acknowledged before the store to PSC. This
presupposes that both store instructions are performed consecutively, as
shown in the above example.
If another instruction is placed between steps 7 and 8, an interrupt request
may be acknowledged in between, and the power save mode may not be
entered.
However if the "di" instruction was executed before (step 3.) none interrupt
will be acknowledged anyway.
3.
At least 5 "nop" instructions must follow the power down mode setting, that
means after the write to PSC. The microcontroller requires this time to
enter power down mode.
4.
Any data can be written to the PRCMD register.
In the example the same data is written, minimizing the number of used
registers.
5.
No special sequence is required for reading the PSC register.
User's Manual U18743EE1V2UM00
// mask all none wake-up interrupts
// unmask all wake-up interrupts
// PSMR.PSM[1:0] = 10B: IDLE2 mode
// enable write to PSC
// wake up by maskable interrupts
// and enter power save mode
// after wake-up
// discard all unwanted pending interrupts
Clock Generator

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