NEC V850ES/F 3-L Series User Manual page 397

Asynchronous Serial Interface (UARTD)
(4)
After reset: 04H
7
UDnOPT0 UDnSRF
R/W R/W
UDnOPT0 - UARTDn option control register 0
The UDnOPT0 register is an 8-bit register that controls the serial transfer
operation of the UARTDn register.
This register can be read or written in 8-bit or 1-bit units.
Reset input sets this register to 14H..
Address:
6 5
UDnSRT UDnSTT
R/W R/W
UDnSRF
When the UDnCTL0.UDnPWR bit = UDnCTL0.UDnRXE bit = 0 are
0
set. Also upon normal end of SBF reception.
1 During SBF reception.
• SBF (Sync Brake Field) reception is judged during LIN communication.
• The UDnSRF bit is held at 1 when an SBF reception error occurs, and then if the
SBF reception is started again and ended normally, the UDnSRF bit is cleared to
0.Clearing by the instruction is disabled.
• UDnSRF bit is read-only.
When the UDnSRF = 1, the judgment process that SBF reception ended normally
differs depending on the values of the SBF reception mode selection bit (UDnSRS). If
the UDnSRS bit = 0, when any high level inputs including noises are applied to the
reception input data even only for a second, the judgment of whether the low level
period is more than 11 bits or not is executed. If the UDnSRS bit = 1, the received
input data is sampled along with the set baud rate and when the low level period is 11
bits or more, it is judged as the successful SBF reception.
UDnSRT
0
1 SBF reception trigger.
• This is the SBF reception trigger bit during LIN communication, and when read,
"0" is always read. For SBF reception, set the UDnSRT bit (to 1) to enable SBF
reception.
• Set the UDnSRT bit after setting the UDnCTL0.UDnPWR bit and
UDnCTL0.UDnRXE bit = 1.
• The UDnSRT bit can be set during the reception but the reception is aborted.
The updating of the status flag, output of the interrupt request flag, and the data
saving are not performed so the receive data set during the reception is not
guaranteed.
• After the UDnSRT bit is set, re-setting of the UDnSRT bit is disabled until the
SBF reception is succeeded, UDnSRF is cleared, and the interrupt request
signal is fallen.
• The detection of the SBF reception starts at the next falling edge of the
reception input data. If the UDnSRT is set during the SBF reception, the SBF
cannot be received, so other reception operations are not performed until the
next SBF reception is succeeded.
User's Manual U18743EE1V2UM00
UD0OPT0: FFFFFA03, UD1OPT0: FFFFFA13
UD2OPT0: FFFFFA23, UD3OPT0: FFFFFA33
UD4OPT0: FFFFFA43, UD5OPT0: FFFFFA53
UD6OPT0: FFFFFA63, UD7OPT0: FFFFFA73
4 3
UDnSLS2 UDnSLS1
R/W R/W
SBF reception flag
SBF reception trigger
Chapter 15
2 1
UDnSLS0 UDnTDL
R/W R/W
-
0
UDnRDL
R/W
397