Power Supply Scheme
(2)
Figure 20-2
20.3 Voltage regulators
Note
V850ES/FG3-L power supply pins assignment
AVREF0
A/D converter
VDD
Regulator
REGC
Main and Sub
oscillators
EVDD
V850ES/FG3-L ower supply pins assignment
The on-chip voltage regulators generate the voltages for the internal circuitry,
refer to Figure 20-1, Figure 20-2.
The regulators operate per default in all operation modes (normal operation,
HALT, IDLE1, IDLE2, STOP, Sub-clock, and during reset).
To stabilize the output voltage of the regulator, connect a capacitor to the
REGC pin. Refer to the Electrical Target Specification.
User's Manual U18743EE1V2UM00
BVDD I/O buffer
Flash
memory
Internal circ uit
EVDD I/O buffer
Chapter 20
BVDD
Bidirectional level shifter
703