NEC V850ES/F 3-L Series User Manual page 732

Chapter 23
(2)
Table 23-3
Pin no. Pin name
(Reserved 1)
A1
A2 (Reserved 2)
A3 (Reserved 3)
A4 (Reserved 4)
A5 (Reserved 5)
A6 (Reserved 6)
A7 DDI
A8 DCK
A9 DMS
DDO
A10
A11 DRST
A12 RESET
A13 FLMD0
B1 GND
B2 GND
B3 GND
B4 GND
B5 GND
B6 GND
B7 GND
B8 GND
B9 GND
B10 GND
B11 (Reserved 8)
B12 (Reserved 9)
B13
V
DD
Caution
732
Pin functions
The following table shows the pin functions of the connector for emulator
connection (target system side). "I/O" indicates the direction viewed from the
device.
Pin functions of connector for emulator connection (target system side)
I/O Pin function
– (Connect to GND)
– (Connect to GND)
– (Connect to GND)
– (Connect to GND)
– (Connect to GND)
– (Connect to GND)
Input Data input for N-Wire interface
Input Clock input for N-Wire interface
Input Transfer mode select input for N-Wire interface
Output Data output for N-Wire interface
Input On-chip debug unit reset input
Input Reset input. (In a system that uses only POC reset and not pin
reset, some emulators input an external reset signal as shown in
Figure 23-6 on page 733 to set the OCDM0 bit to 1.)
Input Control signal for flash download (flash memory versions only)
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– (Connect to GND)
– (Connect to GND)
– 5 V input (for monitoring power supply to target)
1. The connection of the pins not supported by the microcontroller is
dependent upon the emulator to be used.
2. The pattern of the target board must satisfy the following conditions.
• The pattern length must be 100 mm or less.
• The clock signal must be shielded by GND.
User's Manual U18743EE1V2UM00
On-Chip Debug Unit