NEC V850ES/F 3-L Series User Manual page 275

Flash Memory
(3)
V
DD
RESET (input)
FLMD1 (input)
FLMD0 (input)
RXD (input)
TXD (output)
Figure 7-11
Note
Table 7-8
FLMD0 pulses Communication Mode
0 UART
8 CSI
CSI + HS
11
Other –
Selection of the communication mode
The communication interface is chosen by applying a specified number of
pulses to the FLMD0 pin after reset release. Note that this is handled by the
flash programmer.
Figure 7-11 on page 275 gives an example how the UART is established for
the communication between the flash programmer and the microcontroller.
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
Oscillation
V
SS
stabilized
Power on Reset
released
Selection of communication mode
The number of clocks to be inserted differs depending on the chosen
communication mode. For details, refer to Table 7-8 on page 275.
FLMD0 pulses for communication mode setting
When UART has been selected after reception of the FLMD0 pulses with
9600 bps, the flash programmer changes the baud rate according to the user's
choice via the flash programmer's user interface.
At first the programmer sends two 00
microcontoller to measure the baud rate and to set up it's own baud rate
accordingly.
User's Manual U18743EE1V2UM00
(Note)
Communication
mode selected
Flash control command communication
Communication rate: 9600 bps (after reset), LSB first
V850ES/Fx3-L performs slave operation, MSB first
V850ES/Fx3-L performs slave operation, MSB first
Setting prohibited
bytes, which are used by the
H
(erasure, write, etc.)
Remarks
Chapter 7
275