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202 Appendix F: Glossary
Note that you should not adjust network bindings unless you are an experienced
❖
network administrator and are familiar with the requirements of your network
software.
• Non-blocking cache
A type of cache that can handle multiple information requests. If the cache does
not contain the information needed by the processor, it can handle ensuing
requests while the processor accesses the memory.
See also blocking cache.
• PCI
Peripheral Component Interconnect. An expansion bus standard for the'90s.
• PLC
Programmable Logic Controller. A device used to automate monitoring and control
of industrial plants. It can be used as a stand-alone device or in conjunction with
data acquisition.
• PLL
Phase-locked loop. A technique in electronic circuitry for maintaining
synchronization. The circuit receives its timing from input signals, but also
provides a feedback circuit for synchronization. The resulting output signal varies
according to differences between the reference signal and the feedback signal. In
particular, a frame grabber's PLL creates a pixel clock, which is a multiple of a
referenced signal's frequency. In this context, the referenced signal is usually the
horizontal sync. A PLL adjusts the pixel clock frequency according to changes or
variations in its reference signal. Adjusting the pixel clock frequency ensures that
the same number of pixels appears on every row.
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