Intel 855GM Design Manual page 348

Chipset platform
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A
+V3.3ALWAYS_KBC
+V3.3ALWAYS_SMCRST
R7A1
0
4
U7A2
R7A2
SMC_RST#_D
2
RST#
4.7K
MAX809
Circuitry provides an interrupt to the SMC
every 1s while in suspend (this allows the
SMC to complete housekeeping functions while
suspended)
3
CR9G1
LED_SEGA
1
A
AN_DP
LED_SEGB
10
B
LED_SEGC
8
C
LED_SEGD
5
D
CT_DP
LED_SEGE
4
E
LED_SEGF
2
F
LED_SEGG
3
G
CT_COM
7-SEG-LED-DISPLAY
High Nibble (Left)
CR9H2
2
LED_SEGA
1
A
AN_DP
LED_SEGB
10
B
LED_SEGC
8
C
LED_SEGD
5
D
CT_DP
LED_SEGE
4
E
LED_SEGF
2
F
LED_SEGG
3
G
CT_COM
7-SEG-LED-DISPLAY
High Nibble (Left)
1
LED_MUX_HI81
RP9H1A
150
1
8
LED_MUX_HI80
RP9H1B
150
2
7
LED_MUX_LO81
RP9H1C
150
3
6
LED_MUX_LO80
RP9H1D
150
4
5
A
B
SMC SUSPEND TIMER
32
+V3.3ALWAYS_KBC
32
C8A5
0.1UF
14
Q8B1
SMC_RST
BSS138
1
2
1
U7A4A
74HC04
7
SMC_RST# 32
19
1Hz Clock
Disable
Enable
PORT 80-83 DISPLAY
5,6,8,9,11,15..18,20,21,23,26,31,34..36,38..40,45
LED_SEGDP
6
LED_SEGA
1
A
LED_SEGB
10
B
LED_SEGC
7
8
C
LED_SEGD
5
D
LED_SEGE
4
E
LED_SEGF
9
2
F
LED_SEGG
3
G
7-SEG-LED-DISPLAY
Low Nibble (Right)
CR9H1
LED_SEGDP
LED_SEGA
6
1
A
LED_SEGB
10
B
LED_SEGC
8
C
LED_SEGD
7
5
D
LED_SEGE
4
E
LED_SEGF
2
F
LED_SEGG
9
3
G
7-SEG-LED-DISPLAY
Low Nibble (Right)
5,6,8,9,11,15..18,20,21,23,26,31,34..36,38..40,45
3
3
Q9H1
Q8H3
1
1
2N3904
2N3904
2
2
LED_MUX_HI81_D
LED_MUX_HI80_D
LED_MUX_LO81_D
LED_MUX_LO80_D
B
C
32
+V3.3ALWAYS_KBC
14
R8A4
1M
SMC_INIT_CLK1
SMC_INIT_CLK2
3
4
U7A4B
74HC04
7
Q8A1
BSS138
1
KSC_VPPEN#
J8A1
R7B1
Shunt (Default)
No Shunt
8,15..18,20,23..25,27,34,35,38..40,45,46
+V3.3S
CR9G2
PORT 80, 82
LED_SEGDP
6
AN_DP
RP8H5D
RP8H5C
7SEG_LED_CT2
RP8H5B
7
CT_DP
RP8H4D
RP8H4B
RP8H4C
9
CT_COM
RP8H4A
RP8H5A
PORT 81, 83
OE#_PORT80
LED_SEGDP
6
AN_DP
5,6,8,9,11,15..18,20,21,23,26,31,34..36,38..40,45
R9W1
7
100
CT_DP
9
CT_COM
7SEG_LED_CT4
SUS_CLK
19,37
+V3.3S
3
3
C9W1
Q8H4
Q8J1
0.1UF
1
1
2N3904
2N3904
2
2
C
D
14
SMC_INIT_CLK3
5
6
9
U7A4C
C8B1
74HC04
7
4.7uF
SMC_INIT_CLK4
NMI Jumper
R8B2
J8A1
100K
NOTE: Shunt J8A1 for
SMC Programming
32
+V3.3ALWAYS_KBC
14
INVD1
TP_INVD1
0
R7A3
11
10
U7A4E
74HC04
7
Spare gates
8,15..18,20,23..25,27,34,35,38..40,45,46
+V5S
LED_SEGA
150
U9H1
4
5
150
LED_SEGB
3
6
9
VCC1
IO32
LED_SEGC
150
2
7
17
VCC2
IO31
LED_SEGD
150
4
5
29
VCC3
IO30
LED_SEGE
150
2
7
41
VCC4
IO29
150
LED_SEGF
3
6
IO28
LED_SEGG
150
1
8
IO27
LED_SEGDP
150
1
8
TDO/IO26
IO25
IO24
37
6
CLK_PCI_PORT80
GCLK1
IO23
39
7,8,10,15,18
PCI_RST#
GCLR#
IO22
TCK/IO21
IO20
38
OE1
IO19
40
OE2/GCLK2
IO18
IO17
+V3.3S
IO16
IO15
IO14
R8J13
IO13
1K
IO12
IO11
SUS_CLK_Q
IO10
Q8J4
BSS138
TMS/IO6
1
4
GND1
16
GND2
24
GND3
36
GND4
TDI/IO1
EPM7064STC
C9W4
C9W3
0.1UF
0.1UF
Title
SMC Suspend Timer and Port 80 LEDs
Size
Project:
A
Intel 855GM/GME CRB
Date:
Monday, September 15, 2003
D
E
14
8
SMC_INITCLK 32
U7A4D
74HC04
7
32
+V3.3ALWAYS_KBC
14
INVD2
TP_INVD2
0
13
12
U7A4F
74HC04
7
+V5S
C9Y1
C9W2
C9H1
0.1UF
0.1UF
10UF
LPC_FRAME# 19,31,32,34,37
44
PORT82_EN#
43
42
J9H1
35
34
R9W2
PLD_PD
33
32
10K
LED_MUX_HI81
31
LED_MUX_LO81
30
LED_MUX_HI80
28
LED_MUX_LO80
27
26
25
Port
J9H1
23
82-83
Shunt
22
LED_SEGA
No Shunt
21
LED_SEGB
80-81
(Default)
20
LED_SEGC
19
LED_SEGD
18
LED_SEGE
15
LED_SEGF
14
LED_SEGG
13
LED_SEGDP
12
11
IO9
10
IO8
8
IO7
7
6
IO5
LPC_AD3 19,31,32,34,37
5
IO4
LPC_AD2 19,31,32,34,37
3
IO3
LPC_AD1 19,31,32,34,37
2
IO2
LPC_AD0 19,31,32,34,37
1
Document Number
Rev
4.401
<Doc>
Sheet
33
of
50
E
4
3
2
1

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