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4.2.1.
ITP Support
4.2.1.1.
Background/Justification
One key tool that is needed to debug BIOS, logic, signal integrity, general software, and general
hardware issues involving CPUs, chipsets, SIOs, PCI devices, and other hardware in a platform design
is the In Target Probe (ITP). The ITP is widely used by various validation, test, and debug groups within
Intel (as well as by third party BIOS vendors, OEMs, and other developers).
It is extremely important to note that any Intel Pentium M Processor / Intel Celeron M Processor /
Intel 855GM/GME chipset based systems designed without ITP support may prevent assistance
from various Intel validation, test, and debug groups in debugging various issues. For this reason, it
is a critical piece of insurance that ITP support is provided. This can be done with zero additional BOM
cost and very minimal layout/footprint costs.
The cost for not providing this support vary, from no cost (if there are no blocking issues found in the
system design) to schedule slips of a month or more. The latter scenario represents the time needed to
spin a board design and required assembly time to add an ITP port when it is absolutely required and
other mechanical and routing issues prevent the use of an ITP interposer, if one exists.
4.2.1.2.
Implementation
To minimize the ITP connector footprint, the ITP700FLEX alternative is a better option for mobile
designs. However, standard signal connection guidelines for the CPU's TAP logic signals for the non-
ITP case still need to be followed. In other words, only the traces and component footprints need to be
added to the design, with all previous "non-ITP" guidelines followed otherwise. This way, when ITP
support is needed, the termination values and connector can be populated as needed for debug support.
Note that if the ITP700FLEX footprint cannot be followed due to mechanical, routing, or footprint
reasons, it is may be adequate to have a simple via grouping in lieu of the connector to allow for "blue-
wiring" of the ITP, provided that footprints for the resistors are available on board and that the "blue-
wiring" from the signal vias to the ITP700FLEX connector is as short as possible.
4.2.2.
Intel Pentium M / Intel Celeron M Processor Logic Analyzer
Support (FSB LAI)
4.2.2.1.
Background/Justification
The Intel Pentium M / Intel Celeron M FSB Logic Analyzer probe (LAI) is the second key tool. It is
widely used by various validation, test, and debug groups within Intel (as well as by third party BIOS
vendors, OEMs, and other developers) and is needed to debug BIOS, logic, signal integrity, general
software, and general hardware issues involving CPUs, chipsets, SIOs, PCI devices, and other hardware.
For the processor, Agilent* Corporation will develop this tool and will likely be the only visibility to
this critical system bus.
Note: Any Intel Pentium M processor / Intel Celeron M processor / Intel 855GM/GME chipset based systems
designed without FSB LAI support may severely limit the ability of various Intel validation, test, and
debug groups from debugging various issues in a reasonable amount of time.
Because support may be limited, it is critical that the following FSB LAI support is provided:
®
Intel
855GM/855GME Chipset Platform Design Guide
Intel Pentium M/Celeron M Front Side Bus Design Guidelines
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