Platform Design Checklist
16.6.5.
Miscellaneous
Pin Name
10 k Ω 1% pull-up to Vcc3_3
EXTTS
DPWR# (pin
AA22)
LCLKCTLB
LCLKCTLA
GST[2:0]
Leave as NC or 1 k Ω pull-up to Vcc1_5
298
System
Pull-up/Pull-down
Notes
Connect to the processor.
Leave as NC if not used.
Leave as NC if not used.
These pins have internal pull-down.
®
Intel
855GM/855GME Chipset Platform Design Guide
R