Vcca (Pll); Vcc (Core) - Intel 855GM Design Manual

Platform Design Checklist
16.4.3.2.

VCCA (PLL)

Description
Mid Frequency Decoupling (Polymer Covered Tantalum -
POSCAP, Neocap, KO Cap)
High Frequency Decoupling (0603 MLCC, >= X7R) Place next to
the processor
16.4.3.3.

VCC (CORE)

Option
#1 Low-Frequency Decoupling (Polymer Covered
Tantalum – POSCAP, Neocap, KO Cap)
Mid-Frequency Decoupling (0612 MLCC, X5R
or better)
#2 Low-Frequency Decoupling (1206 MLCC, X5R
or better)
Mid-Frequency Decoupling (0612 MLCC, X5R
or better)
#3
Low Frequency Decoupling (Polymer Covered
Aluminum – SP Cap, A0 Cap)
Low Frequency Decoupling (1206 MLCC, >=
X5R)
Mid Frequency Decoupling (0612 MLCC, >=
X5R)
Low-Frequency Decoupling (Polymer Covered
#4
Aluminum – SP CAP, AO Cap)
Mid-Frequency Decoupling (0805 MLCC>=
X5R)
NOTES:
1. Decoupling guidelines are recommendations based on our reference board design. The Intel Customer Reference Board uses
option #4. This is the preferable option to use.
2. When deciding on overall decoupling solution, customers will need to take layout & PCB board design into consideration.
3. Options #4 is to be used with small footprint (100 mm
288
Description
2
or less) 0.36 µH ± 20% inductors.
C, µ F
4 x 10 µ F Place one 10 µ F and one 0.01 µ F
for each VCCA pin.
4 x 0.01 µ F Place one 10 µ F and one 0.01 µ F
for each VCCA pin.
C, µ F ESR, m Ω
12 x 150 µ F 36 m Ω (typ) / 12
15 x 2.2 µ F 5 m Ω (typ) / 15
40x10 µ F 5 m Ω (typ) / 40
15 x 2.2 µ F 5 m Ω (typ) / 15
15 m Ω (max) / 5
5 x 330 µF
5 m Ω (typ) / 25
25 x 10 µF
5 m Ω (typ) / 15
15 x 2.2 µF
4 x 220 µ F 12 m Ω (max) / 4
35 x 10 µ F 5 m Ω (typ) / 35
®
Intel 855GM/855GME Chipset Platform Design Guide
Notes
ESL, nH
2.5 nH / 12
0.2 nH / 15
1.2 nH / 40
0.2 nH / 15
3.5 nH / 5
1.2 nH / 25
0.2 nH / 15
3.5 nH / 4
0.6 nH / 35
R