Format Of Prescaler Mode Register 01 (Prm01) - NEC 78K0 User Manual

CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Figure 7-13. Format of Prescaler Mode Register 01 (PRM01)
Address: FFB7H After reset: 00H
Symbol 7
PRM01 ES111
ES111
0
0
1
1
ES011
0
0
1
1
PRM011
0
0
1
1
Note The external clock requires a pulse two cycles longer than internal clock (f
Cautions 1. When the Ring-OSC clock is selected as the clock to be supplied to the CPU, the clock of the
Ring-OSC oscillator is divided and supplied as the count clock. If the count clock is the
Ring-OSC clock, the operation of 16-bit timer/event counter 01 is not guaranteed. When an
external clock is used and when the Ring-OSC clock is selected and supplied to the CPU, the
operation of 16-bit timer/event counter 01 is not guaranteed, either, because the Ring-OSC
clock is supplied as the sampling clock to eliminate noise.
2. Always set data to PRM01 after stopping the timer operation.
3. If the valid edge of TI001 is to be set for the count clock, do not set the clear & start mode
using the valid edge of TI001 and the capture trigger.
4. If the TI001 or TI011 pin is high level immediately after system reset, the rising edge is
immediately detected after the rising edge or both the rising and falling edges are set as the
valid edge(s) of the TI001 pin or TI011 pin to enable the operation of 16-bit timer counter 01
(TM01). Care is therefore required when pulling up the TI001 or TI011 pin. However, when re-
enabling operation after the operation has been stopped once, the rising edge is not
detected.
5. When P06 is used as the TI011 valid edge, it cannot be used as the timer output (TO01), and
when used as TO01, it cannot be used as the TI011 valid edge.
Remarks 1. f : X1 input clock oscillation frequency
X
2. TI001, TI011: 16-bit timer/event counter 01 input pin
3. Figures in parentheses are for operation with f
R/W
6 5
ES110 ES011 ES010
ES110
0 Falling edge
1 Rising edge
0 Setting prohibited
1 Both falling and rising edges
ES010
0 Falling edge
1 Rising edge
0 Setting prohibited
1 Both falling and rising edges
PRM010
0 f (10 MHz)
X
4
1 f /2 (625 kHz)
X
6
0 f /2 (156.25 kHz)
X
*
Note
1 TI001 valid edge
User's Manual U15947EJ2V0UD
4 3 2
0 0
TI011 valid edge selection
TI001 valid edge selection
Count clock selection
).
X
= 10 MHz.
X
1 0
PRM011 PRM010
183