Format Of Ring-Osc Mode Register (Rcm) - NEC 78K0 User Manual

Remarks 1. MCM0: Bit 0 of main clock mode register (MCM)
2. f : Main system clock oscillation frequency (X1 input clock oscillation frequency or Ring-OSC clock
X
oscillation frequency)
3. f : Ring-OSC clock oscillation frequency
R
4. f : X1 input clock oscillation frequency
XP
5. f : Subsystem clock oscillation frequency
XT
The fastest instruction can be executed in 2 clocks of the CPU clock in the 78K0/KF1. Therefore, the relationship
between the CPU clock (f
Table 6-2. Relationship Between CPU Clock and Minimum Instruction Execution Time
CPU Clock (f )
CPU
0.2
f
X
0.4
f /2
X
2
0.8
f /2
X
3
1.6
f /2
X
4
3.2
f /2
X
f /2
XT
Note The main clock mode register (MCM) is used to set the CPU clock (X1 input clock/Ring-OSC clock) (see
Figure 6-4).
(2) Ring-OSC mode register (RCM)
This register sets the operation mode of Ring-OSC.
This register is valid when "Can be stopped by software" is set for Ring-OSC by a mask option, and the X1 input
clock or subsystem clock is selected as the CPU clock. If "Cannot be stopped" is selected for Ring-OSC by a
mask option, settings for this register are invalid.
RCM can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Address: FFA0H After reset: 00H
Symbol 7
RCM 0
RSTOP
0
1
Caution Make sure that the bit 1 (MCS) of the main clock mode register (MCM) is 1 before
CHAPTER 6 CLOCK GENERATOR
) and minimum instruction execution time is as shown in the Table 6-2.
CPU
Minimum Instruction Execution Time: 2/f
Note
X1 Input Clock
(at 10 MHz Operation)
µ
s
µ
s
µ
s
µ
s
µ
s
−
Figure 6-3. Format of Ring-OSC Mode Register (RCM)
R/W
6 5
0 0
Ring-OSC oscillating
Ring-OSC stopped
setting RSTOP.
User's Manual U15947EJ2V0UD
Note
Ring-OSC Clock
(at 240 kHz (TYP.) Operation)
µ
8.3 s (TYP.)
µ
16.6 s (TYP.)
µ
33.2 s (TYP.)
µ
66.4 s (TYP.)
µ
132.8 s (TYP.)
−
*
4 3
0 0
Ring-OSC oscillating/stopped
CPU
Subsystem Clock
(at 32.768 kHz Operation)
−
−
−
−
−
µ
122.1 s
2 1 <0>
0 0 RSTOP
145