NEC 78K0 User Manual page 460

(b) Release by RESET input
When the RESET signal is input, STOP mode is released and a reset operation is performed after the
oscillation stabilization time has elapsed.
RESET signal
Status of CPU
Operating mode
(X1 input clock)
X1 input clock
RESET signal
Status of CPU
Operating mode
(Ring-OSC clock)
Ring-OSC clock
Remarks 1. f : X1 input clock oscillation frequency
XP
2. f : Ring-OSC clock oscillation frequency
R
Table 21-5. Operation in Response to Interrupt Request in STOP Mode
Release Source
Maskable interrupt
request
RESET input
×: don't care
460
CHAPTER 21 STANDBY FUNCTION
Figure 21-7. STOP Mode Release by RESET Input
(1) When X1 input clock is used as CPU clock
STOP
instruction
STOP mode
Oscillates Oscillation stopped
(2) When Ring-OSC clock is used as CPU clock
STOP
instruction
STOP mode
Oscillates
MK×× PR××
0 0
0 0
0 1
0 1
0 1
×
1
− −
User's Manual U15947EJ2V0UD
Reset
Operation
period stopped Operating mode
(17/f ) (Ring-OSC clock)
R
Oscillation
stopped Oscillates
Oscillation stabilization time (2
*
Reset Operation
period
stopped
(17/f )
R
Oscillation
Oscillates
stopped
IE ISP Operation
×
0 Next address
instruction execution
×
1 Interrupt servicing
execution
0 1 Next address
instruction execution
×
0
1 1 Interrupt servicing
execution
× ×
STOP mode held
× ×
Reset processing
11 16
/f to 2 /f )
XP XP
Operating mode
(Ring-OSC clock)