External Memory Read Modify Write Timing - NEC 78K0 User Manual

Figure 5-8. External Memory Read Modify Write Timing
ASTB
RD
WR
AD0 to AD7
A8 to A15
ASTB
RD
WR
AD0 to AD7
A8 to A15
Internal wait signal
(1-clock wait)
ASTB
RD
WR
AD0 to AD7
A8 to A15
WAIT
Remark The read-modify-write timing is that of an operation when a bit manipulation instruction is executed.
CHAPTER 5 EXTERNAL BUS INTERFACE
(a) No wait (PW1, PW0 = 0, 0) setting
Lower
Read data
address
(b) Wait (PW1, PW0 = 0, 1) setting
Lower
Read data
address
*
(c) External wait (PW1, PW0 = 1, 1) setting
Lower
Read data
address
Higher address
User's Manual U15947EJ2V0UD
Hi-Z
Write data
Higher address
Hi-Z
Write data
Higher address
Hi-Z
Write data
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