NEC 78K0 User Manual page 160

Table 6-3. Relationship Between Operation Clocks in Each Operation Status
Status X1 Oscillator
MSTOP = 0
Operation
MCC = 0
Mode
Reset Stopped
STOP
HALT Oscillating
Notes 1. When "Cannot be stopped" is selected for Ring-OSC by a mask option.
2. When "Can be stopped by software" is selected for Ring-OSC by a mask option.
3. Operates using the CPU clock at STOP instruction execution.
4. Operates using the CPU clock at HALT instruction execution.
Caution The RSTOP setting is valid only when "Can be stopped by software" is set for Ring-OSC by a mask
option.
Remark MSTOP: Bit 7 of the main OSC control register (MOC)
MCC: Bit 7 of the processor clock control register (PCC)
RSTOP: Bit 0 of the Ring-OSC mode register (RCM)
MCM0: Bit 0 of the main clock mode register (MCM)
Table 6-4. Oscillation Control Flags and Clock Oscillation Status
Note
MSTOP = 1
Note
MSTOP = 0
Note
MCC = 1
Note
MCC = 0
Note Setting X1 oscillator oscillating/stopped differs depending on the CPU clock used.
• When the Ring-OSC clock is used as the CPU clock: Set using the MSTOP bit
• When the subsystem clock is used as the CPU clock: Set using the MCC bit
Caution The RSTOP setting is valid only when "Can be stopped by software" is set for Ring-OSC
by a mask option.
Remark MSTOP: Bit 7 of the main OSC control register (MOC)
MCC:
RSTOP: Bit 0 of the Ring-OSC mode register (RCM)
160
CHAPTER 6 CLOCK GENERATOR
Ring-OSC Oscillator
MSTOP = 1 Note 1
MCC = 1
RSTOP = 0 RSTOP = 1
Stopped
Oscillating Oscillating Stopped
Stopped
X1 Oscillator
RSTOP = 0 Stopped
RSTOP = 1 Setting prohibited
RSTOP = 0 Oscillating
RSTOP = 1
RSTOP = 0 Stopped
RSTOP = 1
RSTOP = 0 Oscillating
RSTOP = 1
Bit 7 of the processor clock control register (PCC)
User's Manual U15947EJ2V0UD
Subsystem CPU Clock
Clock
Note 2
Oscillator
Oscillating Ring-OSC Stopped
Note 3
Note 4
Ring-OSC Oscillator
*
Oscillating
Oscillating
Stopped
Oscillating
Stopped
Oscillating
Stopped
Prescaler Clock
After Supplied to Peripherals
Release
MCM0 = 0 MCM0 = 1
Stopped
Ring-OSC X1