Format Of Asynchronous Serial Interface Control Register 6 (Asicl6) - NEC 78K0 User Manual

(6) Asynchronous serial interface control register 6 (ASICL6)
This register controls the serial communication operations of serial interface UART6.
ASICL6 can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets this register to 16H.
Caution ASICL6 can be refreshed (the same value is written) by software during a communication
operation (when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5
(RXE6) of ASIM6 = 1). Note, however, that communication is started by the refresh operation
because bit 6 (SBRT6) of ASICL6 is cleared to 0 when communication is completed (when an
interrupt signal is generated).
Figure 15-10. Format of Asynchronous Serial Interface Control Register 6 (ASICL6)
Address: FF58H After reset: 16H R/W
Symbol <7>
ASICL6 SBRF6
SBRF6
0
1
SBRT6
0
1
DIR6
0
1
TXDLV6
0
1
Note Bits 2 to 5 and 7 are read-only.
Cautions 1. In the case of an SBF reception error, return the mode to the SBF reception mode and hold
the status of the SBRF6 flag.
2. Before setting the SBRT6 bit, make sure that bit 7 (POWER6) and bit 5 (RXE6) of ASIM6 = 1.
3. The read value of the SBRT6 bit is always 0. SBRT6 is automatically cleared to 0 after SBF
reception has been correctly completed.
4. Before rewriting the DIR6 and TXDLV6 bits, clear the TXE6 and RXE6 bits to 0.
CHAPTER 15 SERIAL INTERFACE UART6
Note
<6> 5
SBRT6 0
If POWER6 = 0 and RXE6 = 0 or if SBF reception has been completed correctly
SBF reception in progress
SBF reception trigger
MSB
LSB
Normal output of T D6
X
Inverted output of T D6
X
User's Manual U15947EJ2V0UD
4 3
1 0
SBF reception status flag
SBF reception trigger
−
*
First bit specification
Enables/disables inverting T D6 output
X
2 1 0
1 DIR6 TXDLV6
333