NEC 78K0 User Manual page 392

The relationship between the register settings and pins is shown below.
Table 17-3. Relationship Between Register Settings and Pins
CSIAE0 ATE0 MASTER0 PM143
0 × × ×
1 0 0 1
1
Notes 1. Can be set as port function.
2. Can be used as P143 when only transmission is performed. Clear bit 2 (RXEA0) of CSIMA0
to 0.
3. Can be used as P144 when only reception is performed. Clear bit 3 (TXEA0) of CSIMA0 to 0.
×:
Remark
CSIAE0:
ATE0:
MASTER0:
PM14×:
P14×:
392
CHAPTER 17 SERIAL INTERFACE CSIA0
P143 PM144 P144 PM142 P142
Note 1 Note 1 Note 1 Note 1
× × × ×
Note 2 Note 2 Note 3 Note 3
× 0 0
don't care
Bit 7 of serial operation mode specification register 0 (CSIMA0)
Bit 6 of CSIMA0
Bit 4 of CSIMA0
Port mode register
Port output latch
User's Manual U15947EJ2V0UD
Serial I/O Serial Clock
Shift Counter
Register 0 Operation
Operation Control
Note 1 Note 1
× Operation Clear
stopped
1 × Operation Count
enabled operation
0 1
*
Pin Function
SIA0/ SOA0/ SCKA0/
P143 P144 P142
P143 P144 P142
Note 2 Note 3
SIA0 SOA0 SCKA0
(input)
SCKA0
(output)