Format Of 16-Bit Timer Mode Control Register 01 (Tmc01) - NEC 78K0 User Manual

Figure 7-7. Format of 16-Bit Timer Mode Control Register 01 (TMC01)
Address: FFB6H After reset: 00H
Symbol 7 6 5
TMC01 0 0 0
TMC013 TMC012 TMC011
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
OVF01
0 Overflow not detected
1 Overflow detected
Cautions 1. Timer operation must be stopped before writing to bits other than the OVF01 flag.
2. Set the valid edge of the TI001/P05 pin using prescaler mode register 01 (PRM01).
3. If any of the following modes is selected: the mode in which clear & start occurs on match
between TM01 and CR001, the mode in which clear & start occurs at the TI01 valid edge, or
free-running mode, when the set value of CR001 is FFFFH and the TM01 value changes from
FFFFH to 0000H, the OVF01 flag is set to 1.
Remarks 1. TO01: 16-bit timer/event counter 01 output pin
2. TI001: 16-bit timer/event counter 01 input pin
3. TM01: 16-bit timer counter 01
4. CR001: 16-bit timer capture/compare register 001
5. CR011: 16-bit timer capture/compare register 011
176
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
R/W
4 3 2 1 <0>
0 TMC013 TMC012 TMC011 OVF01
Operating mode and clear
mode selection
Operation stop
(TM01 cleared to 0)
Free-running mode
Clear & start occurs on TI001
valid edge
Clear & start occurs on match
between TM01 and CR001
16-bit timer counter 01 (TM01) overflow detection
User's Manual U15947EJ2V0UD
TO01 inversion timing selection
No change
Match between TM01 and
CR001 or match between
TM01 and CR011
Match between TM01 and
CR001, match between TM01
and CR011 or TI001 valid edge
−
Match between TM01 and
CR001 or match between
TM01 and CR011
Match between TM01 and
CR001, match between TM01
and CR011 or TI001 valid edge
*
Interrupt request generation
Not generated
Generated on match between
TM01 and CR001, or match
between TM01 and CR011