NEC 78K0 User Manual page 436

(3) Priority specification flag registers (PR0L, PR0H, PR1L, PR1H)
The priority specification flag registers are used to set the corresponding maskable interrupt priority order.
PR0L, PR0H, PR1L, and PR1H are set by a 1-bit or 8-bit memory manipulation instruction. If PR0L and PR0H,
and PR1L and PR1H are combined to form 16-bit registers PR0 and PR1, they are set by a 16-bit memory
manipulation instruction.
RESET input sets these registers to FFH.
Figure 19-4. Format of Priority Specification Flag Registers (PR0L, PR0H, PR1L, PR1H)
Address: FFE8H After reset: FFH
Symbol <7>
PR0L SREPR6
Address: FFE9H After reset: FFH
Symbol <7>
PR0H TMPR010
Address: FFEAH After reset: FFH
Symbol <7>
PR1L PPR7
Address: FFEBH After reset: FFH
Symbol 7
Note 1
PR1H 1
XXPRX
0
1
Notes 1. Be sure to set bits 5 to 7 of PR1H to 1.
µ
2. PD780146, 780148, and 78F0148 only. Be sure to set these bits to 1 in the
780144.
436
CHAPTER 19 INTERRUPT FUNCTIONS
R/W
<6> <5>
PPR5 PPR4 PPR3
R/W
<6> <5>
TMPR000 TMPR50 TMPRH0
R/W
<6> <5>
PPR6 WTPR KRPR
R/W
6 5
Note 1 Note 1
1 1 ACSIPR
High priority level
Low priority level
User's Manual U15947EJ2V0UD
<4> <3> <2>
PPR2 PPR1
<4> <3> <2>
TMPRH1 DUALPRO
<4> <3> <2>
TMPR51 WTIPR
<4> <3> <2>
*
Note 2
TMPR011 TMPR001
Priority level selection
<1> <0>
PPR0 LVIPR
<1> <0>
STPR6 SRPR6
<1> <0>
SRPR0 ADPR
<1> <0>
Note 2 Note 2
CSIPR11 DMUPR
µ
PD780143 and