NEC 78K0 User Manual page 542

8-bit single-chip microcontrollers
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CHAPTER 30 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS, (A) GRADE PRODUCTS)
(2) Read/write operation
= −40 to +85°C, 2.7 V ≤ V
(T
A
Parameter
ASTB high-level width
Address setup time
Address hold time
Input time from address to data
Output time from RD↓ to address
Input time from RD↓ to data
Read data hold time
RD low-level width
Input time from RD↓ to WAIT↓
Input time from WR↓ to WAIT↓
WAIT low-level width
Write data setup time
Write data hold time
WR low-level width
Delay time from ASTB↓ to RD↓
Delay time from ASTB↓ to WR↓
Delay time from RD↑ to ASTB↑ at
external fetch
Hold time from RD↑ to address at
external fetch
Write data output time from RD↑
Write data output time from WR↓
Hold time from WR↑ to address
Delay time from WAIT↑ to RD↑
Delay time from WAIT↑ to WR↑
Caution T
can only be used at 0.4
CY
Remarks 1. t
= T
/4
CY
CY
2. n indicates the number of waits.
3. C
= 100 pF (C
L
ASTB pins.)
542
≤ 5.5 V, 2.7 V ≤ AV
= EV
DD
DD
Symbol
Conditions
t
ASTH
t
ADS
t
ADH
t
ADD1
t
ADD2
t
RDAD
t
RDD1
t
RDD2
t
RDH
t
RDL1
t
RDL2
t
RDWT1
t
RDWT2
t
WRWT
t
WTL
t
WDS
t
WDH
t
WRL1
t
ASTRD
t
ASTWR
t
RDAST
t
RDADH
t
RDWD
t
WRWD
t
WRADH
t
WTRD
t
WTWR
µ
s (MIN).
indicates the load capacitance of the AD0 to AD7, A8 to A15, RD, WR, WAIT, and
L
User's Manual U15947EJ2V0UD
≤ V
, V
= EV
= AV
REF
DD
SS
SS
MIN.
0.3t
CY
30
10
0
0
− 40
(1.5 + 2n)t
CY
− 40
(2.5 + 2n)t
CY
(0.5 + 2n)t
+ 10
CY
60
10
− 30
(1.5 + 2n)t
CY
*
10
− 30
2t
CY
− 30
0.8t
CY
− 30
0.8t
CY
40
20
− 30
0.8t
CY
0.5t
CY
0.5t
CY
= 0 V)
SS
(2/2)
MAX.
Unit
ns
ns
ns
− 108
(2 + 2n)t
ns
CY
− 120
(3 + 2n)t
ns
CY
200
ns
− 148
(2 + 2n)t
ns
CY
− 162
(3 + 2n)t
ns
CY
ns
ns
ns
− 75
t
ns
CY
− 60
t
ns
CY
− 50
t
ns
CY
(2 + 2n)t
ns
CY
ns
ns
ns
ns
ns
1.2t
ns
CY
1.2t
+ 60
ns
CY
ns
120
ns
1.2t
+ 60
ns
CY
2.5t
+ 50
ns
CY
2.5t
+ 50
ns
CY

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