Figure No.
16-5
16-6
16-7
16-8
16-9
16-10
Timing of Clock/Data Phase ...................................................................................................................374
16-11
Output Operation of First Bit ...................................................................................................................375
16-12
17-1
17-2
17-3
17-4
17-5
17-6
17-7
17-8
17-9
17-10
17-11
17-12
17-13
17-14
17-15
Internal Buffer RAM Operation in 6-Byte Transmission/Reception
17-16
17-17
17-18
17-19
17-20
17-21
17-22
17-23
17-24
17-25
17-26
17-27
17-28
17-29
26
LIST OF FIGURES (7/10)
Title
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User's Manual U15947EJ2V0UD
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