NEC 78K0 User Manual page 7

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p.148 Addition of Cautions 2 and 3 to Figure 6-6 Format of Oscillation Stabilization Time Counter Status
Register (OSTC)
pp.150 to 152 Modification of Figure 6-8 Examples of External Circuit of X1 Oscillator, Figure 6-9 Examples of
External Circuit of Subsystem Clock Oscillator, and Figure 6-10 Examples of Incorrect Resonator
Connection
p.157 Modification of Notes 4 and 5 in Figure 6-13 Status Transition Diagram (2)
p.159 Modification of Note 4 and illustration in Figure 6-13 Status Transition Diagram (4)
p.160 Modification of Table 6-3 Relationship Between Operation Clocks in Each Operation Status
p.163 Modification of Note in Figure 6-14 Switching from Ring-OSC Clock to X1 Input Clock (Flowchart)
p.165 Addition of Note to Figure 6-16 Switching from X1 Input Clock to Subsystem Clock (Flowchart)
p.168 Revision of CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
p.212 Revision of CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 50 AND 51
p.230 Revision of CHAPTER 9 8-BIT TIMERS H0 AND H1
p.255 Modification of Figure 10-1 Watch Timer Block Diagram
p.261 Addition of Figure 10-4 Example of Generation of Watch Timer Interrupt Request (INTWT) (When
Interrupt Period = 0.5 s)
p.272 Modification of Figure 12-1 Block Diagram of Clock Output/Buzzer Output Controller
p.277 Revision of CHAPTER 13 A/D CONVERTER
p.299 Revision of CHAPTER 14 SERIAL INTERFACE UART0
p.320 Revision of CHAPTER 15 SERIAL INTERFACE UART6
p.358 Revision of CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
p.378 Revision of CHAPTER 17 SERIAL INTERFACE CSIA0
p.418 Revision of CHAPTER 18 MULTIPLIER/DIVIDER
pp.429, 430 Addition of Note to INTVLI, POC, and LVI in Table 19-1 Interrupt Source List
p.433 Addition of Note 2 to Table 19-2 Flags Corresponding to Interrupt Request Sources
p.434 Addition of Caution 2 to Figure 19-2 Format of Interrupt Request Flag Registers (IF0L, IF0H, IF1L, IF1H)
p.437 Addition of Caution to Table 19-3 Ports Corresponding to EGPn and EGNn
Addition of software interrupt request item to Table 19-5 Relationship Between Interrupt Requests
p.442
Enabled for Multiple Interrupt Servicing During Interrupt Servicing
p.446 Modification of Figure 20-1 Block Diagram of Key Interrupt
p.448 Modification of Table 21-1 Relationship Between HALT Mode, STOP Mode, and Clock in old edition to
Table 21-1 Relationship Between Operation Clocks in Each Operation Status
p.450 Addition of Cautions 2 and 3 to Figure 21-1 Format of Oscillation Stabilization Time Counter Status
Register (OSTC)
p.452 Modification of Table 21-1 Operating Statuses in HALT Mode
p.456 Addition of (3) When subsystem clock is used as CPU clock to Figure 21-4 HALT Mode Release by
RESET Input
p.457 Modification of the following items in Table 21-4 Operating Statuses in STOP Mode
• 8-bit timer H0
• Serial interfaces UART0 and UART6
pp.462 to 464 Modification of Figure 22-1 Block Diagram of Reset Function to Figure 22-4 Timing of Reset in STOP
Mode by RESET Input
Major Revisions in This Edition (2/3)
Description
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User's Manual U15947EJ2V0UD
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